Lines Matching +full:syscon +full:- +full:tcsr
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sa8775p-qmp-gen4x2-pcie-phy
20 - qcom,sa8775p-qmp-gen4x4-pcie-phy
21 - qcom,sc8180x-qmp-pcie-phy
22 - qcom,sc8280xp-qmp-gen3x1-pcie-phy
23 - qcom,sc8280xp-qmp-gen3x2-pcie-phy
24 - qcom,sc8280xp-qmp-gen3x4-pcie-phy
25 - qcom,sdm845-qhp-pcie-phy
26 - qcom,sdm845-qmp-pcie-phy
27 - qcom,sdx55-qmp-pcie-phy
28 - qcom,sdx65-qmp-gen4x2-pcie-phy
29 - qcom,sm8150-qmp-gen3x1-pcie-phy
30 - qcom,sm8150-qmp-gen3x2-pcie-phy
31 - qcom,sm8250-qmp-gen3x1-pcie-phy
32 - qcom,sm8250-qmp-gen3x2-pcie-phy
33 - qcom,sm8250-qmp-modem-pcie-phy
34 - qcom,sm8350-qmp-gen3x1-pcie-phy
35 - qcom,sm8450-qmp-gen3x1-pcie-phy
36 - qcom,sm8450-qmp-gen4x2-pcie-phy
37 - qcom,sm8550-qmp-gen3x2-pcie-phy
38 - qcom,sm8550-qmp-gen4x2-pcie-phy
39 - qcom,sm8650-qmp-gen3x2-pcie-phy
40 - qcom,sm8650-qmp-gen4x2-pcie-phy
50 clock-names:
53 - const: aux
54 - const: cfg_ahb
55 - const: ref
56 - enum: [rchng, refgen]
57 - const: pipe
58 - const: pipediv2
59 - const: phy_aux
61 power-domains:
68 reset-names:
71 - const: phy
72 - const: phy_nocsr
74 vdda-phy-supply: true
76 vdda-pll-supply: true
78 vdda-qref-supply: true
80 qcom,4ln-config-sel:
81 description: PCIe 4-lane configuration
82 $ref: /schemas/types.yaml#/definitions/phandle-array
84 - items:
85 - description: phandle of TCSR syscon
86 - description: offset of PCIe 4-lane configuration register
87 - description: offset of configuration bit for this PHY
89 "#clock-cells":
92 clock-output-names:
95 "#phy-cells":
99 - compatible
100 - reg
101 - clocks
102 - clock-names
103 - resets
104 - reset-names
105 - vdda-phy-supply
106 - vdda-pll-supply
107 - "#clock-cells"
108 - clock-output-names
109 - "#phy-cells"
114 - if:
119 - qcom,sc8280xp-qmp-gen3x4-pcie-phy
124 - description: port a
125 - description: port b
127 - qcom,4ln-config-sel
133 - if:
138 - qcom,sc8180x-qmp-pcie-phy
139 - qcom,sdm845-qhp-pcie-phy
140 - qcom,sdm845-qmp-pcie-phy
141 - qcom,sdx55-qmp-pcie-phy
142 - qcom,sm8150-qmp-gen3x1-pcie-phy
143 - qcom,sm8150-qmp-gen3x2-pcie-phy
144 - qcom,sm8250-qmp-gen3x1-pcie-phy
145 - qcom,sm8250-qmp-gen3x2-pcie-phy
146 - qcom,sm8250-qmp-modem-pcie-phy
147 - qcom,sm8350-qmp-gen3x1-pcie-phy
148 - qcom,sm8450-qmp-gen3x1-pcie-phy
149 - qcom,sm8450-qmp-gen3x2-pcie-phy
150 - qcom,sm8550-qmp-gen3x2-pcie-phy
151 - qcom,sm8550-qmp-gen4x2-pcie-phy
152 - qcom,sm8650-qmp-gen3x2-pcie-phy
153 - qcom,sm8650-qmp-gen4x2-pcie-phy
158 clock-names:
161 - if:
166 - qcom,sc8280xp-qmp-gen3x1-pcie-phy
167 - qcom,sc8280xp-qmp-gen3x2-pcie-phy
168 - qcom,sc8280xp-qmp-gen3x4-pcie-phy
173 clock-names:
176 - if:
181 - qcom,sa8775p-qmp-gen4x2-pcie-phy
182 - qcom,sa8775p-qmp-gen4x4-pcie-phy
187 clock-names:
190 - if:
195 - qcom,sm8550-qmp-gen4x2-pcie-phy
196 - qcom,sm8650-qmp-gen4x2-pcie-phy
201 reset-names:
207 reset-names:
211 - |
212 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
215 compatible = "qcom,sc8280xp-qmp-gen3x2-pcie-phy";
224 clock-names = "aux", "cfg_ahb", "ref", "rchng",
227 power-domains = <&gcc PCIE_2B_GDSC>;
230 reset-names = "phy";
232 vdda-phy-supply = <&vreg_l6d>;
233 vdda-pll-supply = <&vreg_l4d>;
235 #clock-cells = <0>;
236 clock-output-names = "pcie_2b_pipe_clk";
238 #phy-cells = <0>;
242 compatible = "qcom,sc8280xp-qmp-gen3x4-pcie-phy";
251 clock-names = "aux", "cfg_ahb", "ref", "rchng",
254 power-domains = <&gcc PCIE_2A_GDSC>;
257 reset-names = "phy";
259 vdda-phy-supply = <&vreg_l6d>;
260 vdda-pll-supply = <&vreg_l4d>;
262 qcom,4ln-config-sel = <&tcsr 0xa044 0>;
264 #clock-cells = <0>;
265 clock-output-names = "pcie_2a_pipe_clk";
267 #phy-cells = <0>;