Lines Matching +full:de +full:- +full:activated
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Root Port controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie
23 - compatible
26 - $ref: /schemas/pci/pci-bus.yaml#
27 - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
28 - if:
31 - msi-map
34 interrupt-names:
41 At least DBI reg-space and peripheral devices CFG-space outbound window
43 also required if the space is unrolled (IP-core version >= 4.80a).
47 reg-names:
52 - description:
53 Basic DWC PCIe controller configuration-space accessible over
54 the DBI interface. This memory space is either activated with
60 - description:
61 Shadow DWC PCIe config-space registers. This space is selected
63 the PCI-SIG PCIe CFG-space with the shadow registers for some
65 mainly relevant for the end-point controller configuration,
69 - description:
70 External Local Bus registers. It's an application-dependent
73 be accessed over some platform-specific means (for instance
76 - description:
80 and CS2 = 1. For IP-core releases prior v4.80a, these registers
86 - description:
87 Platform-specific eDMA registers. Some platforms may have eDMA
88 CSRs mapped in a non-standard base address. The registers offset
89 can be changed or the MS/LS-bits of the address can be attached
90 in an additional RTL block before the MEM-IO transactions reach
93 - description:
98 platform-specific method.
100 - description:
101 Outbound iATU-capable memory-region which will be used to access
104 - description:
105 Vendor-specific CSR names. Consider using the generic names above
108 - description: See native 'elbi/app' CSR region for details.
110 - description: See native 'atu' CSR region for details.
112 - description: Syscon-related CSR regions.
114 - description: Tegra234 aperture
117 - contains:
119 - contains:
129 interrupt-names:
134 - description:
138 - description:
143 - description:
149 pattern: '^dma([0-9]|1[0-5])?$'
150 - description:
155 - description:
159 - description:
160 Application-specific IRQ raised depending on the vendor-specific
163 - description:
164 DSP AXI MSI Interrupt detected. It gets de-asserted when there is
166 iMSI-RX - Integrated MSI Receiver (AXI bridge).
168 - description:
173 - description:
179 - description:
184 - description:
185 Hot-plug event is detected. That is a bit has been set in the
189 - description:
194 - description:
199 - description:
203 - description:
204 Vendor-specific IRQ names. Consider using the generic names above
207 - description: See native "app" IRQ for details
213 - compatible
214 - reg
215 - reg-names
218 - |
220 compatible = "snps,dw-pcie";
224 reg-names = "dbi", "config";
225 #address-cells = <3>;
226 #size-cells = <2>;
229 bus-range = <0x0 0xff>;
232 interrupt-names = "msi", "hp";
233 #interrupt-cells = <1>;
235 reset-gpios = <&port0 0 1>;
238 phy-names = "pcie";
240 num-lanes = <1>;
241 max-link-speed = <3>;