Lines Matching +full:32 +full:- +full:rail
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kalle Valo <kvalo@kernel.org>
18 - qcom,ath10k # SDIO-based devices
19 - qcom,ipq4019-wifi
20 - qcom,wcn3990-wifi # SNoC-based devices
25 reg-names:
27 - const: membase
33 interrupt-names:
37 memory-region:
40 Reference to the MSA memory region used by the Wi-Fi firmware
51 clock-names:
58 reset-names:
60 - const: wifi_cpu_init
61 - const: wifi_radio_srif
62 - const: wifi_radio_warm
63 - const: wifi_radio_cold
64 - const: wifi_core_warm
65 - const: wifi_core_cold
67 ext-fem-name:
71 - microsemi-lx5586
72 - sky85703-11
73 - sky85803
75 wifi-firmware:
79 The ath10k Wi-Fi node can contain one optional firmware subnode.
85 - iommus
87 ieee80211-freq-limit: true
89 qcom,ath10k-calibration-data:
90 $ref: /schemas/types.yaml#/definitions/uint8-array
92 Calibration data + board-specific data as a byte array. The length
95 qcom,ath10k-calibration-variant:
98 Unique variant identifier of the calibration data in board-2.bin
101 qcom,ath10k-pre-calibration-data:
102 $ref: /schemas/types.yaml#/definitions/uint8-array
104 Pre-calibration data as a byte array. The length can vary between
107 qcom,coexist-support:
113 qcom,coexist-gpio-pin:
116 COEX GPIO number provided to the Wi-Fi firmware.
118 qcom,msa-fixed-perm:
124 qcom,smem-states:
125 $ref: /schemas/types.yaml#/definitions/phandle-array
128 - description: Signal bits used to enable/disable low power mode
131 qcom,smem-state-names:
134 - const: wlan-smp2p-out
136 qcom,snoc-host-cap-8bit-quirk:
142 qcom,xo-cal-data:
147 vdd-0.8-cx-mx-supply:
148 description: Main logic power rail
150 vdd-1.8-xo-supply:
153 vdd-1.3-rfa-supply:
156 vdd-3.3-ch0-supply:
157 description: Primary Wi-Fi antenna supply
159 vdd-3.3-ch1-supply:
160 description: Secondary Wi-Fi antenna supply
163 - compatible
164 - reg
169 - $ref: ieee80211.yaml#
170 - if:
175 - qcom,ipq4019-wifi
182 interrupt-names:
184 - const: msi0
185 - const: msi1
186 - const: msi2
187 - const: msi3
188 - const: msi4
189 - const: msi5
190 - const: msi6
191 - const: msi7
192 - const: msi8
193 - const: msi9
194 - const: msi10
195 - const: msi11
196 - const: msi12
197 - const: msi13
198 - const: msi14
199 - const: msi15
200 - const: legacy
204 - description: Wi-Fi command clock
205 - description: Wi-Fi reference clock
206 - description: Wi-Fi RTC clock
208 clock-names:
210 - const: wifi_wcss_cmd
211 - const: wifi_wcss_ref
212 - const: wifi_wcss_rtc
215 - clocks
216 - clock-names
217 - interrupts
218 - interrupt-names
219 - resets
220 - reset-names
222 - if:
227 - qcom,wcn3990-wifi
234 - description: XO reference clock
235 - description: Qualcomm Debug Subsystem clock
237 clock-names:
240 - const: cxo_ref_clk_pin
241 - const: qdss
245 - description: CE0
246 - description: CE1
247 - description: CE2
248 - description: CE3
249 - description: CE4
250 - description: CE5
251 - description: CE6
252 - description: CE7
253 - description: CE8
254 - description: CE9
255 - description: CE10
256 - description: CE11
258 interrupt-names: false
261 - interrupts
265 - |
266 #include <dt-bindings/clock/qcom,rpmcc.h>
267 #include <dt-bindings/interrupt-controller/arm-gic.h>
270 compatible = "qcom,wcn3990-wifi";
272 reg-names = "membase";
273 memory-region = <&wlan_msa_mem>;
275 clock-names = "cxo_ref_clk_pin";
290 qcom,snoc-host-cap-8bit-quirk;
291 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
292 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
293 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
294 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
295 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
297 wifi-firmware {
303 - |
304 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
307 compatible = "qcom,ipq4019-wifi";
315 reset-names = "wifi_cpu_init",
324 clock-names = "wifi_wcss_cmd",
327 interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
344 interrupt-names = "msi0",
361 ieee80211-freq-limit = <5470000 5875000>;