Lines Matching +full:high +full:- +full:bandwidth
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
28 The SparX-5 switch family targets managed Layer 2 and Layer 3
29 equipment in SMB, SME, and Enterprise where high port count
34 pattern: "^switch@[0-9a-f]+$"
37 const: microchip,sparx5-switch
41 - description: cpu target
42 - description: devices target
43 - description: general control block target
45 reg-names:
47 - const: cpu
48 - const: devices
49 - const: gcb
54 - description: register based extraction
55 - description: frame dma based extraction
56 - description: ptp interrupt
58 interrupt-names:
61 - const: xtr
62 - const: fdma
63 - const: ptp
67 - description: Reset controller used for switch core reset (soft reset)
69 reset-names:
71 - const: switch
73 mac-address: true
75 ethernet-ports:
80 '#address-cells':
82 '#size-cells':
86 "^port@[0-9a-f]+$":
87 $ref: /schemas/net/ethernet-controller.yaml#
100 microchip,bandwidth:
101 description: Specifies bandwidth in Mbit/s allocated to the port.
105 microchip,sd-sgpio:
115 - reg
116 - phys
117 - phy-mode
118 - microchip,bandwidth
121 - required:
122 - phy-handle
123 - required:
124 - sfp
125 - managed
128 - compatible
129 - reg
130 - reg-names
131 - interrupts
132 - interrupt-names
133 - ethernet-ports
138 - |
139 #include <dt-bindings/interrupt-controller/arm-gic.h>
141 compatible = "microchip,sparx5-switch";
145 reg-names = "cpu", "devices", "gcb";
147 interrupt-names = "xtr";
149 reset-names = "switch";
150 ethernet-ports {
151 #address-cells = <1>;
152 #size-cells = <0>;
156 microchip,bandwidth = <1000>;
158 phy-handle = <&phy0>;
159 phy-mode = "qsgmii";
165 microchip,bandwidth = <25000>;
167 phy-mode = "10gbase-r";
169 managed = "in-band-status";
170 microchip,sd-sgpio = <365>;
174 microchip,bandwidth = <25000>;
176 phy-mode = "10gbase-r";
178 managed = "in-band-status";
179 microchip,sd-sgpio = <369>;
183 microchip,bandwidth = <25000>;
185 phy-mode = "10gbase-r";
187 managed = "in-band-status";
188 microchip,sd-sgpio = <373>;
192 microchip,bandwidth = <25000>;
194 phy-mode = "10gbase-r";
196 managed = "in-band-status";
197 microchip,sd-sgpio = <377>;
202 microchip,bandwidth = <1000>;
204 phy-handle = <&phy64>;
205 phy-mode = "sgmii";
206 mac-address = [ 00 00 00 01 02 03 ];