Lines Matching +full:imx28 +full:- +full:gpmi +full:- +full:nand

1 * Freescale General-Purpose Media Interface (GPMI)
3 The GPMI nand controller provides an interface to control the
4 NAND flash chips.
7   - compatible : should be "fsl,<chip>-gpmi-nand", chip can be:
9     * imx28
13   - reg : should contain registers location and length for gpmi and bch.
14   - reg-names: Should contain the reg names "gpmi-nand" and "bch"
15   - interrupts : BCH interrupt number.
16   - interrupt-names : Should be "bch".
17   - dmas: DMA specifier, consisting of a phandle to DMA controller node
18     and GPMI DMA channel ID.
19     Refer to dma.txt and fsl-mxs-dma.txt for details.
20   - dma-names: Must be "rx-tx".
21   - clocks : clocks phandle and clock specifier corresponding to each clock
22     specified in clock-names.
23   - clock-names : The "gpmi_io" clock is always required. Which clocks are
25     * imx23/imx28 : "gpmi_io"
30   - nand-on-flash-bbt: boolean to enable on flash bbt option if not
32   - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
38                        the software may chooses an implementation-defined
40   - fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB
44                              'nand-on-flash-bbt'.
50   - nand-ecc-strength: integer representing the number of bits to correct
52   - nand-ecc-step-size: integer representing the number of data bytes
56 The device tree may optionally contain sub-nodes describing partitions of the
61 gpmi-nand@8000c000 {
62 	compatible = "fsl,imx28-gpmi-nand";
63 	#address-cells = <1>;
64 	#size-cells = <1>;
66 	reg-names = "gpmi-nand", "bch";
68 	interrupt-names = "bch";
70 	dma-names = "rx-tx";