Lines Matching +full:rb +full:- +full:gpios
7 explained in a separate documents - please refer to
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 Documentation/devicetree/bindings/mtd/nand-controller.yaml
16 - compatible: "ti,omap2-nand"
17 - reg: range id (CS number), base offset and length of the
19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount.
23 - nand-bus-width: Set this numeric value to 16 if the hardware
27 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
28 "sw" 1-bit Hamming ecc code via software
30 "hw-romcode" <deprecated> use "ham1" instead
31 "ham1" 1-bit Hamming ecc code
32 "bch4" 4-bit BCH ecc code
33 "bch8" 8-bit BCH ecc code
34 "bch16" 16-bit BCH ECC code
37 - ti,nand-xfer-type: A string setting the data transfer type. One of:
39 "prefetch-polled" Prefetch polled mode (default)
41 "prefetch-dma" Prefetch enabled DMA mode
42 "prefetch-irq" Prefetch enabled irq mode
44 - elm_id: <deprecated> use "ti,elm-id" instead
45 - ti,elm-id: Specifies phandle of the ELM devicetree node.
46 ELM is an on-chip hardware engine on TI SoC which is used for
50 - rb-gpios: GPIO specifier for the ready/busy# pin.
54 - #address-cells: should be set to 1
55 - #size-cells: should be set to 1
60 compatible = "ti,am3352-gpmc";
64 gpmc,num-cs = <8>;
65 gpmc,num-waitpins = <2>;
66 #address-cells = <2>;
67 #size-cells = <1>;
70 interrupt-controller;
71 #interrupt-cells = <2>;
74 compatible = "ti,omap2-nand";
76 interrupt-parent = <&gpmc>;
78 nand-bus-width = <16>;
79 ti,nand-ecc-opt = "bch8";
80 ti,nand-xfer-type = "polled";
81 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
83 gpmc,sync-clk-ps = <0>;
84 gpmc,cs-on-ns = <0>;
85 gpmc,cs-rd-off-ns = <44>;
86 gpmc,cs-wr-off-ns = <44>;
87 gpmc,adv-on-ns = <6>;
88 gpmc,adv-rd-off-ns = <34>;
89 gpmc,adv-wr-off-ns = <44>;
90 gpmc,we-off-ns = <40>;
91 gpmc,oe-off-ns = <54>;
92 gpmc,access-ns = <64>;
93 gpmc,rd-cycle-ns = <82>;
94 gpmc,wr-cycle-ns = <82>;
95 gpmc,wr-access-ns = <40>;
96 gpmc,wr-data-mux-bus-ns = <0>;
98 #address-cells = <1>;
99 #size-cells = <1>;
106 --------------------------------------------------
107 Higher ECC scheme usually means better protection against bit-flips and
113 support ecc-schemes with hardware error-correction (BCHx_HW). However
114 such SoC can use ecc-schemes with software library for error-correction
116 library remains equivalent to their hardware counter-part, but there is
117 slight CPU penalty when too many bit-flips are detected during reads.
120 Other factor which governs the selection of ecc-scheme is oob-size.
128 PAGESIZE number of bytes in main-area of device page
137 trying to use BCH16 (ECC_BYTES=26) ecc-scheme.
141 probably use lower ecc-schemes like BCH8.
144 trying to use BCH16 (ECC_BYTES=26) ecc-scheme.
147 (OOBSIZE=128). So this device can use BCH16 ecc-scheme.