Lines Matching +full:tslch +full:- +full:ns

4 - compatible : should be one of the following:
5 	Generic default - "cdns,qspi-nor".
6 	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
7 	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".
8 - reg : Contains two entries, each of which is a tuple consisting of a
12 - interrupts : Unit interrupt specifier for the controller interrupt.
13 - clocks : phandle to the Quad SPI clock.
14 - cdns,fifo-depth : Size of the data FIFO in words.
15 - cdns,fifo-width : Bus width of the data FIFO in bytes.
16 - cdns,trigger-address : 32-bit indirect AHB trigger address.
19 - cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
20 - cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
27 - cdns,read-delay : Delay for read capture logic, in clock cycles
28 - cdns,tshsl-ns : Delay in nanoseconds for the length that the master
29                   mode chip select outputs are de-asserted between
31 - cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
32                   de-activated and the activation of another.
33 - cdns,tchsh-ns : Delay in nanoseconds between last bit of current
36 - cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
38 - resets	: Must contain an entry for each entry in reset-names.
40 - reset-names	: Must include either "qspi" and/or "qspi-ocp".
45 		compatible = "cdns,qspi-nor";
46 		#address-cells = <1>;
47 		#size-cells = <0>;
52 		cdns,is-decoded-cs;
53 		cdns,fifo-depth = <128>;
54 		cdns,fifo-width = <4>;
55 		cdns,trigger-address = <0x00000000>;
57 		reset-names = "qspi", "qspi-ocp";
61 			cdns,read-delay = <4>;
62 			cdns,tshsl-ns = <50>;
63 			cdns,tsd2d-ns = <50>;
64 			cdns,tchsh-ns = <4>;
65 			cdns,tslch-ns = <4>;