Lines Matching +full:rk3399 +full:- +full:cru
1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Helen Koike <helen.koike@collabora.com>
19 - rockchip,px30-cif-isp
20 - rockchip,rk3399-cif-isp
29 interrupt-names:
31 - const: isp
32 - const: mi
33 - const: mipi
39 - description: ISP clock
40 - description: ISP AXI clock
41 - description: ISP AHB clock
43 - description: ISP Pixel clock
45 clock-names:
49 - const: isp
50 - const: aclk
51 - const: hclk
53 - const: pclk
62 phy-names:
65 power-domains:
73 $ref: /schemas/graph.yaml#/$defs/port-base
75 description: connection point for sensors at MIPI-DPHY RX0
79 $ref: video-interfaces.yaml#
83 data-lanes:
88 $ref: /schemas/graph.yaml#/$defs/port-base
94 $ref: video-interfaces.yaml#
98 bus-type:
102 - bus-type
105 - required:
106 - port@0
107 - required:
108 - port@1
111 - compatible
112 - reg
113 - interrupts
114 - clocks
115 - clock-names
116 - iommus
117 - phys
118 - phy-names
119 - power-domains
120 - ports
123 - if:
127 const: rockchip,rk3399-cif-isp
133 clock-names:
137 - if:
141 const: rockchip,px30-cif-isp
144 - interrupt-names
149 - |
151 #include <dt-bindings/clock/rk3399-cru.h>
152 #include <dt-bindings/interrupt-controller/arm-gic.h>
153 #include <dt-bindings/power/rk3399-power.h>
156 #address-cells = <2>;
157 #size-cells = <2>;
160 compatible = "rockchip,rk3399-cif-isp";
163 clocks = <&cru SCLK_ISP0>,
164 <&cru ACLK_ISP0_WRAPPER>,
165 <&cru HCLK_ISP0_WRAPPER>;
166 clock-names = "isp", "aclk", "hclk";
169 phy-names = "dphy";
170 power-domains = <&power RK3399_PD_ISP0>;
173 #address-cells = <1>;
174 #size-cells = <0>;
178 #address-cells = <1>;
179 #size-cells = <0>;
183 remote-endpoint = <&wcam_out>;
184 data-lanes = <1 2>;
189 remote-endpoint = <&ucam_out>;
190 data-lanes = <1>;
197 #address-cells = <1>;
198 #size-cells = <0>;
203 clocks = <&cru SCLK_TESTCLKOUT1>;
207 remote-endpoint = <&mipi_in_wcam>;
208 data-lanes = <1 2>;
217 clocks = <&cru SCLK_TESTCLKOUT1>;
218 clock-names = "xvclk";
220 avdd-supply = <&pp2800_cam>;
221 dovdd-supply = <&pp1800>;
222 dvdd-supply = <&pp1800>;
226 remote-endpoint = <&mipi_in_ucam>;
227 data-lanes = <1>;
234 - |
236 #include <dt-bindings/interrupt-controller/arm-gic.h>
237 #include <dt-bindings/power/px30-power.h>
240 #address-cells = <2>;
241 #size-cells = <2>;
244 compatible = "rockchip,px30-cif-isp";
249 interrupt-names = "isp", "mi", "mipi";
250 clocks = <&cru SCLK_ISP0>,
251 <&cru ACLK_ISP0_WRAPPER>,
252 <&cru HCLK_ISP0_WRAPPER>,
253 <&cru PCLK_ISP1_WRAPPER>;
254 clock-names = "isp", "aclk", "hclk", "pclk";
257 phy-names = "dphy";
258 power-domains = <&power PX30_PD_VI>;
261 #address-cells = <1>;
262 #size-cells = <0>;
266 #address-cells = <1>;
267 #size-cells = <0>;
271 remote-endpoint = <&ucam1_out>;
272 data-lanes = <1 2>;
279 #address-cells = <1>;
280 #size-cells = <0>;
285 clocks = <&cru SCLK_CIF_OUT>;
289 remote-endpoint = <&mipi_in_ucam1>;
290 data-lanes = <1 2>;