Lines Matching +full:cs +full:- +full:value +full:- +full:bit
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/st,spear-spics-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST Microelectronics SPEAr SPI CS GPIO Controller
10 - Viresh Kumar <vireshk@kernel.org>
27 const: st,spear-spics-gpio
32 gpio-controller: true
34 '#gpio-cells':
37 st-spics,peripcfg-reg:
41 st-spics,sw-enable-bit:
42 description: Bit offset to enable software chipselect control.
45 st-spics,cs-value-bit:
46 description: Bit offset to drive chipselect low or high.
49 st-spics,cs-enable-mask:
53 st-spics,cs-enable-shift:
54 description: Bit shift for programming chipselect number.
58 - compatible
59 - reg
60 - gpio-controller
61 - '#gpio-cells'
62 - st-spics,peripcfg-reg
63 - st-spics,sw-enable-bit
64 - st-spics,cs-value-bit
65 - st-spics,cs-enable-mask
66 - st-spics,cs-enable-shift
71 - |
73 compatible = "st,spear-spics-gpio";
75 st-spics,peripcfg-reg = <0x3b0>;
76 st-spics,sw-enable-bit = <12>;
77 st-spics,cs-value-bit = <11>;
78 st-spics,cs-enable-mask = <3>;
79 st-spics,cs-enable-shift = <8>;
80 gpio-controller;
81 #gpio-cells = <2>;