Lines Matching +full:single +full:- +full:link
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinay Simha BN <simhavcs@gmail.com>
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
30 vdd-supply:
33 vddio-supply:
36 stby-gpios:
40 reset-gpios:
62 Video port for Dual link LVDS output (panel or connector).
65 - port@0
66 - port@1
69 - compatible
70 - reg
71 - vdd-supply
72 - vddio-supply
73 - stby-gpios
74 - reset-gpios
75 - ports
80 - |
81 #include <dt-bindings/gpio/gpio.h>
83 /* For single-link LVDS display panel */
87 label = "HS-I2C2";
89 clock-frequency = <400000>; /* fastmode operation */
90 #address-cells = <1>;
91 #size-cells = <0>;
97 vdd-supply = <&pm8916_l2>;
98 vddio-supply = <&pm8916_l6>;
100 stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>;
101 reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>;
104 #address-cells = <1>;
105 #size-cells = <0>;
110 remote-endpoint = <&dsi0_out>;
117 remote-endpoint = <&panel_in>;
126 reg-names = "dsi_ctrl";
129 #address-cells = <1>;
130 #size-cells = <0>;
134 remote-endpoint = <&d2l_in_test>;
135 data-lanes = <0 1 2 3>;
141 - |
142 /* For dual-link LVDS display panel */
146 label = "HS-I2C2";
148 clock-frequency = <400000>; /* fastmode operation */
149 #address-cells = <1>;
150 #size-cells = <0>;
156 vdd-supply = <&pm8916_l2>;
157 vddio-supply = <&pm8916_l6>;
159 stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>;
160 reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>;
163 #address-cells = <1>;
164 #size-cells = <0>;
169 remote-endpoint = <&dsi0_out_dual>;
176 remote-endpoint = <&panel_in0>;
183 remote-endpoint = <&panel_in1>;
192 reg-names = "dsi_ctrl";
195 #address-cells = <1>;
196 #size-cells = <0>;
200 remote-endpoint = <&d2l_in_dual>;
201 data-lanes = <0 1 2 3>;