Lines Matching +full:ls1028a +full:- +full:plldig

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,plldig.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock
10   - Wen He <wen.he_1@nxp.com>
13   NXP LS1028A has a clock domain PXLCLK0 used for the Display output
19     const: fsl,ls1028a-plldig
27   '#clock-cells':
30   fsl,vco-hz:
41   - compatible
42   - reg
43   - clocks
44   - '#clock-cells'
50   - |
51     dpclk: clock-display@f1f0000 {
52         compatible = "fsl,ls1028a-plldig";
54         #clock-cells = <0>;