Lines Matching +full:0 +full:x12460000
49 which generates clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1}
196 #clock-cells = <0>;
203 reg = <0x10030000 0x0c04>;
218 reg = <0x10fc0000 0x0c04>;
227 reg = <0x105b0000 0x100c>;
238 reg = <0x14c80000 0x0b08>;
244 reg = <0x10040000 0x0b20>;
250 reg = <0x156e0000 0x0b04>;
277 reg = <0x12460000 0x0b08>;
291 reg = <0x13b90000 0x0c04>;
317 reg = <0x114c0000 0x0b04>;
327 reg = <0x13600000 0x0b04>;
336 reg = <0x14800000 0x0b04>;
345 reg = <0x13400000 0x0b04>;
354 reg = <0x14aa0000 0x1000>;
364 reg = <0x13cf0000 0x0b10>;
378 reg = <0x11900000 0x1088>;
387 reg = <0x11800000 0x1088>;
396 reg = <0x105d0000 0x0b10>;
410 reg = <0x15280000 0x0b08>;
420 reg = <0x14f80000 0x0b08>;
430 reg = <0x146d0000 0x0b0c>;
444 reg = <0x120d0000 0x0b0c>;
460 reg = <0x145d0000 0x0b08>;
482 reg = <0x11060000 0x1000>;
500 reg = <0x14C10000 0x100>;
501 interrupts = <0 421 0>;
506 pinctrl-0 = <&uart0_bus>;