Lines Matching +full:slave +full:- +full:mode
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
54 #define VATPIC_LOCK(vatpic) mtx_lock_spin(&((vatpic)->mtx))
55 #define VATPIC_UNLOCK(vatpic) mtx_unlock_spin(&((vatpic)->mtx))
56 #define VATPIC_LOCKED(vatpic) mtx_owned(&((vatpic)->mtx))
72 bool sfn; /* special fully-nested mode */
78 uint8_t smm; /* special mask mode */
94 VM_CTR0((vatpic)->vm, fmt)
97 VM_CTR1((vatpic)->vm, fmt, a1)
100 VM_CTR2((vatpic)->vm, fmt, a1, a2)
103 VM_CTR3((vatpic)->vm, fmt, a1, a2, a3)
106 VM_CTR4((vatpic)->vm, fmt, a1, a2, a3, a4)
112 for (tmpvar = 0, pinvar = (atpic->lowprio + 1) & 0x7; \
122 if (atpic == &vatpic->atpic[0]) in master_atpic()
137 if (atpic->service & bit) { in vatpic_get_highest_isrpin()
140 * cleared by a non-specific EOI in Special Mask Mode. in vatpic_get_highest_isrpin()
142 if (atpic->smm && (atpic->mask & bit) != 0) in vatpic_get_highest_isrpin()
149 return (-1); in vatpic_get_highest_isrpin()
159 * In 'Special Fully-Nested Mode' when an interrupt request from in vatpic_get_highest_irrpin()
160 * a slave is in service, the slave is not locked out from the in vatpic_get_highest_irrpin()
163 serviced = atpic->service; in vatpic_get_highest_irrpin()
164 if (atpic->sfn) in vatpic_get_highest_irrpin()
168 * In 'Special Mask Mode', when a mask bit is set in OCW1 it inhibits in vatpic_get_highest_irrpin()
173 if (atpic->smm) in vatpic_get_highest_irrpin()
190 if ((atpic->request & bit) != 0 && (atpic->mask & bit) == 0) in vatpic_get_highest_irrpin()
194 return (-1); in vatpic_get_highest_irrpin()
206 * First check the slave. in vatpic_notify_intr()
208 atpic = &vatpic->atpic[1]; in vatpic_notify_intr()
209 if (!atpic->intr_raised && in vatpic_notify_intr()
210 (pin = vatpic_get_highest_irrpin(atpic)) != -1) { in vatpic_notify_intr()
211 VATPIC_CTR4(vatpic, "atpic slave notify pin = %d " in vatpic_notify_intr()
213 atpic->mask, atpic->request, atpic->service); in vatpic_notify_intr()
216 * Cascade the request from the slave to the master. in vatpic_notify_intr()
218 atpic->intr_raised = true; in vatpic_notify_intr()
222 VATPIC_CTR3(vatpic, "atpic slave no eligible interrupts " in vatpic_notify_intr()
224 atpic->mask, atpic->request, atpic->service); in vatpic_notify_intr()
230 atpic = &vatpic->atpic[0]; in vatpic_notify_intr()
231 if (!atpic->intr_raised && in vatpic_notify_intr()
232 (pin = vatpic_get_highest_irrpin(atpic)) != -1) { in vatpic_notify_intr()
235 atpic->mask, atpic->request, atpic->service); in vatpic_notify_intr()
245 * 1. Legacy PIC Mode: the PIC effectively bypasses in vatpic_notify_intr()
246 * all APIC components. In this mode the local APIC is in vatpic_notify_intr()
250 * 2. Virtual Wire Mode: the APIC is treated as a in vatpic_notify_intr()
252 * to the CPU. In this mode LINT0 is programmed as in vatpic_notify_intr()
256 * 3. Virtual Wire Mode via I/O APIC: PIC interrupts are in vatpic_notify_intr()
258 * CPU. In this mode the I/O APIC input 0 is programmed in vatpic_notify_intr()
262 atpic->intr_raised = true; in vatpic_notify_intr()
263 lapic_set_local_intr(vatpic->vm, NULL, APIC_LVT_LINT0); in vatpic_notify_intr()
264 vioapic_pulse_irq(vatpic->vm, 0); in vatpic_notify_intr()
268 atpic->mask, atpic->request, atpic->service); in vatpic_notify_intr()
277 atpic->ready = false; in vatpic_icw1()
279 atpic->icw_num = 1; in vatpic_icw1()
280 atpic->request = 0; in vatpic_icw1()
281 atpic->mask = 0; in vatpic_icw1()
282 atpic->lowprio = 7; in vatpic_icw1()
283 atpic->rd_cmd_reg = 0; in vatpic_icw1()
284 atpic->poll = 0; in vatpic_icw1()
285 atpic->smm = 0; in vatpic_icw1()
288 VATPIC_CTR0(vatpic, "vatpic cascade mode required"); in vatpic_icw1()
289 return (-1); in vatpic_icw1()
294 return (-1); in vatpic_icw1()
297 atpic->icw_num++; in vatpic_icw1()
307 atpic->irq_base = val & 0xf8; in vatpic_icw2()
309 atpic->icw_num++; in vatpic_icw2()
319 atpic->icw_num++; in vatpic_icw3()
330 VATPIC_CTR0(vatpic, "vatpic microprocessor mode required"); in vatpic_icw4()
331 return (-1); in vatpic_icw4()
335 atpic->aeoi = true; in vatpic_icw4()
339 atpic->sfn = true; in vatpic_icw4()
342 "mode on slave atpic: %#x", val); in vatpic_icw4()
346 atpic->icw_num = 0; in vatpic_icw4()
347 atpic->ready = true; in vatpic_icw4()
357 atpic->mask = val & 0xff; in vatpic_ocw1()
367 atpic->rotate = ((val & OCW2_R) != 0); in vatpic_ocw2()
376 /* non-specific EOI */ in vatpic_ocw2()
380 if (isr_bit != -1) { in vatpic_ocw2()
381 atpic->service &= ~(1 << isr_bit); in vatpic_ocw2()
383 if (atpic->rotate) in vatpic_ocw2()
384 atpic->lowprio = isr_bit; in vatpic_ocw2()
386 } else if ((val & OCW2_SL) != 0 && atpic->rotate == true) { in vatpic_ocw2()
388 atpic->lowprio = val & 0x7; in vatpic_ocw2()
400 atpic->smm = val & OCW3_SMM ? 1 : 0; in vatpic_ocw3()
401 VATPIC_CTR2(vatpic, "%s atpic special mask mode %s", in vatpic_ocw3()
402 master_atpic(vatpic, atpic) ? "master" : "slave", in vatpic_ocw3()
403 atpic->smm ? "enabled" : "disabled"); in vatpic_ocw3()
408 atpic->rd_cmd_reg = val & OCW3_RIS; in vatpic_ocw3()
410 /* Polling mode */ in vatpic_ocw3()
411 atpic->poll = ((val & OCW3_P) != 0); in vatpic_ocw3()
429 atpic = &vatpic->atpic[pin >> 3]; in vatpic_set_pinstate()
431 oldcnt = atpic->acnt[pin & 0x7]; in vatpic_set_pinstate()
433 atpic->acnt[pin & 0x7]++; in vatpic_set_pinstate()
435 atpic->acnt[pin & 0x7]--; in vatpic_set_pinstate()
436 newcnt = atpic->acnt[pin & 0x7]; in vatpic_set_pinstate()
442 level = ((vatpic->elc[pin >> 3] & (1 << (pin & 0x7))) != 0); in vatpic_set_pinstate()
447 atpic->request |= (1 << (pin & 0x7)); in vatpic_set_pinstate()
452 atpic->request &= ~(1 << (pin & 0x7)); in vatpic_set_pinstate()
471 atpic = &vatpic->atpic[irq >> 3]; in vatpic_set_irqstate()
473 if (atpic->ready == false) in vatpic_set_irqstate()
542 vatpic->elc[irq >> 3] |= 1 << (irq & 0x7); in vatpic_set_irq_trigger()
544 vatpic->elc[irq >> 3] &= ~(1 << (irq & 0x7)); in vatpic_set_irq_trigger()
560 atpic = &vatpic->atpic[0]; in vatpic_pending_intr()
566 atpic = &vatpic->atpic[1]; in vatpic_pending_intr()
574 if (pin == -1) in vatpic_pending_intr()
578 *vecptr = atpic->irq_base + pin; in vatpic_pending_intr()
586 atpic->intr_raised = false; in vatpic_pin_accepted()
588 if (atpic->acnt[pin] == 0) in vatpic_pin_accepted()
589 atpic->request &= ~(1 << pin); in vatpic_pin_accepted()
591 if (atpic->aeoi == true) { in vatpic_pin_accepted()
592 if (atpic->rotate == true) in vatpic_pin_accepted()
593 atpic->lowprio = pin; in vatpic_pin_accepted()
595 atpic->service |= (1 << pin); in vatpic_pin_accepted()
611 if ((vector & ~0x7) == vatpic->atpic[1].irq_base) { in vatpic_intr_accepted()
612 vatpic_pin_accepted(&vatpic->atpic[1], pin); in vatpic_intr_accepted()
614 * If this vector originated from the slave, in vatpic_intr_accepted()
617 vatpic_pin_accepted(&vatpic->atpic[0], 2); in vatpic_intr_accepted()
619 vatpic_pin_accepted(&vatpic->atpic[0], pin); in vatpic_intr_accepted()
635 if (atpic->poll) { in vatpic_read()
636 atpic->poll = 0; in vatpic_read()
647 *eax = atpic->mask; in vatpic_read()
649 if (atpic->rd_cmd_reg == OCW3_RIS) { in vatpic_read()
651 *eax = atpic->service; in vatpic_read()
654 *eax = atpic->request; in vatpic_read()
678 switch (atpic->icw_num) { in vatpic_write()
696 if (atpic->ready) { in vatpic_write()
704 if (atpic->ready) in vatpic_write()
720 atpic = &vatpic->atpic[0]; in vatpic_master_handler()
723 return (-1); in vatpic_master_handler()
740 atpic = &vatpic->atpic[1]; in vatpic_slave_handler()
743 return (-1); in vatpic_slave_handler()
763 return (-1); in vatpic_elc_handler()
769 *eax = vatpic->elc[0]; in vatpic_elc_handler()
771 *eax = vatpic->elc[1]; in vatpic_elc_handler()
777 * mode. in vatpic_elc_handler()
779 * For the slave PIC the real time clock (IRQ8) and in vatpic_elc_handler()
781 * be programmed for level mode. in vatpic_elc_handler()
784 vatpic->elc[0] = (*eax & 0xf8); in vatpic_elc_handler()
786 vatpic->elc[1] = (*eax & 0xde); in vatpic_elc_handler()
800 vatpic->vm = vm; in vatpic_init()
802 mtx_init(&vatpic->mtx, "vatpic lock", NULL, MTX_SPIN); in vatpic_init()
810 mtx_destroy(&vatpic->mtx); in vatpic_cleanup()
822 for (i = 0; i < nitems(vatpic->atpic); i++) { in vatpic_snapshot()
823 atpic = &vatpic->atpic[i]; in vatpic_snapshot()
825 SNAPSHOT_VAR_OR_LEAVE(atpic->ready, meta, ret, done); in vatpic_snapshot()
826 SNAPSHOT_VAR_OR_LEAVE(atpic->icw_num, meta, ret, done); in vatpic_snapshot()
827 SNAPSHOT_VAR_OR_LEAVE(atpic->rd_cmd_reg, meta, ret, done); in vatpic_snapshot()
829 SNAPSHOT_VAR_OR_LEAVE(atpic->aeoi, meta, ret, done); in vatpic_snapshot()
830 SNAPSHOT_VAR_OR_LEAVE(atpic->poll, meta, ret, done); in vatpic_snapshot()
831 SNAPSHOT_VAR_OR_LEAVE(atpic->rotate, meta, ret, done); in vatpic_snapshot()
832 SNAPSHOT_VAR_OR_LEAVE(atpic->sfn, meta, ret, done); in vatpic_snapshot()
833 SNAPSHOT_VAR_OR_LEAVE(atpic->irq_base, meta, ret, done); in vatpic_snapshot()
834 SNAPSHOT_VAR_OR_LEAVE(atpic->request, meta, ret, done); in vatpic_snapshot()
835 SNAPSHOT_VAR_OR_LEAVE(atpic->service, meta, ret, done); in vatpic_snapshot()
836 SNAPSHOT_VAR_OR_LEAVE(atpic->mask, meta, ret, done); in vatpic_snapshot()
837 SNAPSHOT_VAR_OR_LEAVE(atpic->smm, meta, ret, done); in vatpic_snapshot()
839 SNAPSHOT_BUF_OR_LEAVE(atpic->acnt, sizeof(atpic->acnt), in vatpic_snapshot()
841 SNAPSHOT_VAR_OR_LEAVE(atpic->lowprio, meta, ret, done); in vatpic_snapshot()
842 SNAPSHOT_VAR_OR_LEAVE(atpic->intr_raised, meta, ret, done); in vatpic_snapshot()
845 SNAPSHOT_BUF_OR_LEAVE(vatpic->elc, sizeof(vatpic->elc), in vatpic_snapshot()