Lines Matching +full:high +full:- +full:efficiency

42 system provides a uniform, modular and architecture-independent
48 .Bl -bullet -offset indent
50 architecture-independent macros or functions to access parallel ports
57 with kernel-in drivers.
61 and non-standard software:
63 .Bl -column "Driver" -compact
67 .It Sy lpbb Ta "Philips official parallel port I2C bit-banging interface"
73 .Bl -column "Driver" -compact
100 .Bl -bullet -offset indent
104 bidirectional 8/4-bits mode, also called NIBBLE mode
130 In this mode, outputs are 8-bits long.
136 any transfer is 8-bits long.
141 for a high performance bidirectional communication path between the host
145 .Bl -item -offset indent
154 The EPP protocol was originally developed as a means to provide a high
168 operate at close to the same performance levels as an equivalent ISA plug-in
188 .Sh IEEE1284-1994 Standard
236 as a set of procedures that perform high level functions like negotiation,
257 .Bl -enum -offset indent
259 share the parallel port bus among the daisy-chain like connected devices
263 propose an arch-independent interface to access the hardware layer.
280 This architecture should support IEEE1284-1994 modes.
292 draft from (c)1993-4 Microsoft Corporation)
305 High level interrupt handlers are connected to the ppbus system thanks to the
319 is a general purpose mechanism to allow fast low-level
322 standard (in IEEE1284 modes) or non-standard transfers.
332 operations and microseq language are coded at adapter level for efficiency.