Lines Matching +full:zynq +full:- +full:can +full:- +full:1

8 .\" 1. Redistributions of source code must retain the above copyright
35 .Bd -ragged -offset indent
45 the Xilinx Zynq-7000, the Xilinx Zynq UltraScale+, and the SiFive
51 .Bl -tag -width ".Cm 10baseT/UTP"
54 The user can manually override
64 option can also be used to select either
65 .Cm full-duplex
67 .Cm half-duplex
74 option can also be used to select either
75 .Cm full-duplex
77 .Cm half-duplex
82 .Cm full-duplex
89 .Bl -tag -width ".Cm full-duplex"
90 .It Cm full-duplex
91 Force full-duplex operation.
92 .It Cm half-duplex
93 Force half-duplex operation.
98 The device and driver also support 1536-byte frames for VLANs (vlanmtu).
105 .Bl -tag -width "xxxxxxxx"
117 This tunable enables a work-around to recover from receive hangs.
118 The default value is 1.
119 Set to 0 to disable the work-around.
122 The following read-only variables are available as
125 .Bl -tag -width "xxxxxxxx"
149 A 64-bit counter of the number of bytes transmitted in frames without error.
193 A 64-bit counter of bytes received without error excluding pause
204 Counter of 64-byte frames received without error.
254 .%T "Zynq-7000 SoC Technical Reference Manual (Xilinx doc UG585)"
255 .%U http://www.xilinx.com/support/documentation/user_guides/\:ug585-Zynq-7000-TRM.pdf
268 The GEM can perform TCP/UDP/IP checksum offloading.
273 For this reason, checksum offloading is disabled by default but can be
279 .Xr netstat 1
286 The GEM used in the Zynq-7000 has a bug such that the receiver can
289 "Known Issues" of the Zynq-7000 SoC Technical Reference Manual (Xilinx
293 driver implements the work-around suggested in the manual.
294 It is believed that the bug does not exist in the Zynq UltraScale+ and
295 SiFive SoCs so the work-around is disabled in those instances and enabled
297 The work-around can be disabled by setting the