Lines Matching full:dsb

14         "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
20DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded b…
25 "BriefDescription": "Retired Instructions who experienced DSB miss.",
34 …"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. …
40 "BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
49 …tical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls we…
330 "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
337 …s uops were delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",
342 "BriefDescription": "Cycles DSB is delivering optimal number of Uops",
349 …line) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",
354 …tion": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",
360 …ber of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",
372 …line) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",
384 …line) path. During these cycles uops are not being delivered from the Decode Stream Buffer (DSB).",
395 …MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",
407 …the Microcode Sequencer (MS) is busy. Uops maybe initiated by Decode Stream Buffer (DSB) or MITE.",
412 "BriefDescription": "Number of switches from DSB or MITE to the MS",
420 …"PublicDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pi…