Lines Matching +full:per +full:- +full:rate
3 …Total pipeline cost of branch related instructions (used for program control-flow including functi…
4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR…
9 …of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and B…
10 …- INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) …
15 "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
21 "BriefDescription": "Uops Per Instruction",
27 "BriefDescription": "Instruction per taken branch",
33 "BriefDescription": "Cycles Per Instruction (per Logical Processor)",
39 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
45 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
51 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
57 "BriefDescription": "The ratio of Executed- by Issued-Uops",
61 …ion": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions. R…
64 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
70 "BriefDescription": "Floating Point Operations Per Cycle",
76 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
80 …ion": "Actual per-core usage of the Floating Point execution units (regardless of the vector width…
83 …"BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is …
89 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
101 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
107 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
113 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
119 … "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
125 "BriefDescription": "Instruction per taken branch",
131 "BriefDescription": "Branch instructions per taken branch. ",
137 …"BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occ…
143 …"BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurre…
147 …"PublicDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurr…
150 …Description": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number me…
154 …Description": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number me…
157 …Description": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number me…
161 …Description": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number me…
164 …riefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means …
168 …blicDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means …
171 …"BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means h…
175 …PublicDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means h…
178 …"BriefDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means hi…
182 …PublicDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means hi…
191 "BriefDescription": "Average number of Uops issued by front-end when it issued something",
209 "BriefDescription": "Number of Instructions per non-speculative DSB miss",
215 "BriefDescription": "Fraction of branches that are non-taken conditionals",
234 …"MetricExpr": "(BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR…
240 …- ( (BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (BR_INST_RETIRED.COND_TAKEN / B…
245 …"BriefDescription": "Actual Average Latency for L1 data-cache miss demand load instructions (in co…
249 … Latency for L1 data-cache miss demand load instructions (in core cycles). Latency may be overesti…
252 …BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is …
270 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
276 "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]",
282 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",
288 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…
294 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",
300 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…
301 …"MetricExpr": "1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQ…
306 …"BriefDescription": "L2 cache misses per kilo instruction for all demand loads (including specula…
312 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…
318 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
324 … "BriefDescription": "Fill Buffer (FB) true hits per kilo instructions for retired demand loads",
337 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…
343 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",
361 "BriefDescription": "Giga Floating Point Operations Per Second",
373 …"BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for ba…
377 …s running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX…
380 …"BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for li…
384 … running with power-delivery for license level 1. This includes high current AVX 256-bit instruct…
387 …"BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for li…
391 …e the core was running with power-delivery for license level 2 (introduced in SKX). This includes…
395 …"MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_o…
406 "BriefDescription": "Cycles Per Instruction for the Operating System (OS) Kernel mode",
430 …cy of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads …
436 …o external DRAM memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches",
472 …per Far Branch ( Far Branches apply upon transition from application to operating system, handling…
478 "BriefDescription": "C1 residency percent per core",
479 "MetricExpr": "(cstate_core@c1\\-residency@ / msr@tsc@) * 100",
484 "BriefDescription": "C6 residency percent per core",
485 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
490 "BriefDescription": "C2 residency percent per package",
491 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
496 "BriefDescription": "C6 residency percent per package",
497 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",