Lines Matching +full:high +full:- +full:bandwidth
3 …Total pipeline cost of branch related instructions (used for program control-flow including functi…
4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR…
9 …of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and B…
10 …- INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) …
39 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
45 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
51 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
57 "BriefDescription": "The ratio of Executed- by Issued-Uops",
61 …iption": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions…
64 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
76 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
80 …on": "Actual per-core usage of the Floating Point execution units (regardless of the vector width)…
83 …"BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is …
89 … "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear)",
150 …"BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower num…
154 …"PublicDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower nu…
157 …"BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower num…
161 …"PublicDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower nu…
164 …"BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number mean…
168 …"PublicDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number mea…
171 …"BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means h…
175 …"PublicDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means …
178 …"BriefDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means hi…
182 …"PublicDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means h…
191 "BriefDescription": "Average number of Uops issued by front-end when it issued something",
209 "BriefDescription": "Number of Instructions per non-speculative DSB miss",
215 "BriefDescription": "Fraction of branches that are non-taken conditionals",
234 …"MetricExpr": "(BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR…
240 …- ( (BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (BR_INST_RETIRED.COND_TAKEN / B…
245 …"BriefDescription": "Actual Average Latency for L1 data-cache miss demand load instructions (in co…
249 … Latency for L1 data-cache miss demand load instructions (in core cycles). Latency may be overesti…
252 …BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is …
258 "BriefDescription": "Average data fill bandwidth to the L1 data cache [GB / sec]",
264 "BriefDescription": "Average data fill bandwidth to the L2 cache [GB / sec]",
270 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]",
276 "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]",
301 …"MetricExpr": "1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQ…
373 …"BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for ba…
377 …s running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX…
380 …"BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for li…
384 … running with power-delivery for license level 1. This includes high current AVX 256-bit instruct…
387 …"BriefDescription": "Fraction of Core cycles where the core was running with power-delivery for li…
391 …e the core was running with power-delivery for license level 2 (introduced in SKX). This includes…
395 …"MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_o…
412 "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]",
430 …cy of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads …
436 …o external DRAM memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches",
442 "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]",
448 "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]",
454 "BriefDescription": "Average IO (network or disk) Bandwidth Use for Writes [GB / sec]",
460 "BriefDescription": "Average IO (network or disk) Bandwidth Use for Reads [GB / sec]",
479 "MetricExpr": "(cstate_core@c1\\-residency@ / msr@tsc@) * 100",
485 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
491 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
497 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",