Lines Matching +full:a +full:- +full:h

16 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
46 .Bl -tag -width "Li PMC_CLASS_IAP"
48 Fixed-function counters that count only one hardware event per counter.
50 Programmable counters that may be configured to count one of a defined
60 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
61 .%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C"
62 .%N "Order Number: 325462-052US"
71 .Bl -column "PMC_CAP_INTERRUPT" "Support"
88 .Bl -tag -width indent
90 Configure the Off-core Response bits.
91 .Bl -tag -width indent
99 requests generated by a write to data cacheline.
129 M-state initial lookup stat in L3.
131 E-state.
133 S-state.
135 F-state.
139 No details on snoop-related information.
143 A snoop was needed and it missed all snooped caches:
148 A snoop was needed and it hits in at least one snooped cache.
149 Hit denotes a cache-line was valid before snoop effect.
156 A snoop was needed and data was forwarded from a remote socket.
160 A snoop was needed and it HitM-ed in local or remote cache.
161 HitM denotes a cache-line was in modified state before effect as a results of snoop.
167 Target was non-DRAM system address.
172 events measured in a cycle is greater than or equal to
175 Configure the PMC to count the number of de-asserted to asserted
177 If specified, the counter will increment only once whenever a
202 .Bl -tag -width indent
204 .Pq Event 03H , Umask 02H
208 .Pq Event 05H , Umask 01H
209 Speculative cache-line split load uops dispatched to
212 .Pq Event 05H , Umask 02H
213 Speculative cache-line split Store-address uops
216 .Pq Event 07H , Umask 01H
220 .Pq Event 08H , Umask 01H
221 Misses in all TLB levels that cause a page walk of any
224 .Pq Event 08H , Umask 02H
228 .Pq Event 08H , Umask 02H
232 .Pq Event 08H , Umask 0EH
236 .Pq Event 08H , Umask 10H
237 Cycle PMH is busy with a walk.
239 .Pq Event 08H , Umask 20H
242 .Pq Event 08H , Umask 40H
245 .Pq Event 08H , Umask 60H
249 .Pq Event 08H , Umask 80H
250 DTLB demand load misses with low part of linear-to-
253 .Pq Event 0DH , Umask 03H
258 .Pq Event 0EH , Umask 01H
264 .Pq Event 0EH , Umask 10H
265 Number of flags-merge uops allocated.
268 .Pq Event 0EH , Umask 20H
271 regardless if as a result of LEA instruction or not.
273 .Pq Event 0EH , Umask 40H
277 .Pq Event 24H , Umask 21H
281 .Pq Event 24H , Umask 41H
284 .Pq Event 24H , Umask E1H
288 .Pq Event 24H , Umask 42H
292 .Pq Event 24H , Umask 22H
296 .Pq Event 24H , Umask E2H
299 .Pq Event 24H , Umask 44H
302 .Pq Event 24H , Umask 24H
306 .Pq Event 24H , Umask 27H
309 .Pq Event 24H , Umask E7H
312 .Pq Event 24H , Umask E4H
315 .Pq Event 24H , Umask 50H
318 .Pq Event 24H , Umask 30H
322 .Pq Event 24H , Umask F8H
325 .Pq Event 24H , Umask 3FH
328 .Pq Event 24H , Umask FFH
331 .Pq Event 27H , Umask 50H
336 that reference a cache line in the last level cache.
338 .Pq Event 2EH , Umask 41H
342 .Pq Event 3CH , Umask 00H
344 is not in a halt state.
349 .Pq Event 3CH , Umask 01H
353 .Pq Event 48H , Umask 01H
358 .Pq Event 49H , Umask 01H
362 .Pq Event 49H , Umask 02H
366 .Pq Event 49H , Umask 04H
370 .Pq Event 49H , Umask 0EH
374 .Pq Event 49H , Umask 10H
377 .Pq Event 49H , Umask 20H
380 .Pq Event 49H , Umask 40H
383 .Pq Event 49H , Umask 60H
387 .Pq Event 49H , Umask 80H
388 DTLB store misses with low part of linear-to-physical
391 .Pq Event 4CH , Umask 01H
392 Non-SW-prefetch load dispatches that hit fill buffer
395 .Pq Event 4CH , Umask 02H
396 Non-SW-prefetch load dispatches that hit fill buffer
397 allocated for H/W prefetch.
399 .Pq Event 51H , Umask 01H
403 .Pq Event 58H , Umask 04H
407 .Pq Event 58H , Umask 08H
411 .Pq Event 58H , Umask 01H
414 .Pq Event 58H , Umask 02H
418 .Pq Event 5CH , Umask 02H
421 .Pq Event 5CH , Umask 01H
424 .Pq Event 5EH , Umask 01H
427 .Pq Event 60H , Umask 01H
432 .Pq Event 60H , Umask 02H
437 .Pq Event 60H , Umask 04H
441 .Pq Event 60H , Umask 08H
446 .Pq Event 63H , Umask 01H
447 Cycles in which the L1D and L2 are locked, due to a
450 .Pq Event 63H , Umask 02H
453 .Pq Event 79H , Umask 02H
456 .Pq Event 79H , Umask 04H
461 .Pq Event 79H , Umask 08H
466 .Pq Event 79H , Umask 10H
472 .Pq Event 79H , Umask 20H
477 .Pq Event 79H , Umask 30H
482 .Pq Event 79H , Umask 18H
486 .Pq Event 79H , Umask 18H
490 .Pq Event 79H , Umask 24H
494 .Pq Event 79H , Umask 24H
498 .Pq Event 79H , Umask 3CH
501 .Pq Event 80H , Umask 02H
506 .Pq Event 85H , Umask 01H
507 Misses in ITLB that causes a page walk of any page
510 .Pq Event 85H , Umask 02H
514 .Pq Event 85H , Umask 04H
518 .Pq Event 85H , Umask 0EH
521 .Pq Event 85H , Umask 10H
522 Cycle PMH is busy with a walk.
524 .Pq Event 85H , Umask 20H
527 .Pq Event 85H , Umask 40H
530 .Pq Event 85H , Umask 60H
534 .Pq Event 87H , Umask 01H
538 .Pq Event 87H , Umask 04H
541 .Pq Event 88H , Umask 41H
545 .Pq Event 88H , Umask 81H
549 .Pq Event 88H , Umask 82H
553 .Pq Event 88H , Umask 84H
557 .Pq Event 88H , Umask 88H
558 Count indirect near branches that have a return mnemonic.
560 .Pq Event 88H , Umask 90H
564 .Pq Event 88H , Umask A0H
568 .Pq Event 88H , Umask FFH
571 .Pq Event 89H , Umask 41H
574 .Pq Event 89H , Umask 81H
577 .Pq Event 89H , Umask 84H
581 .Pq Event 89H , Umask 88H
582 Count mispredicted indirect near branches that have a return mnemonic.
584 .Pq Event 89H , Umask 90H
588 .Pq Event 89H , Umask A0H
592 .Pq Event 89H , Umask FFH
595 .Pq Event 9CH , Umask 01H
596 Count number of non-delivered uops to RAT per
599 .Pq Event A1H , Umask 01H
600 Cycles which a Uop is dispatched on port 0 in this
603 .Pq Event A1H , Umask 02H
604 Cycles which a Uop is dispatched on port 1 in this
607 .Pq Event A1H , Umask 04H
608 Cycles which a Uop is dispatched on port 2 in this
611 .Pq Event A1H , Umask 08H
612 Cycles which a Uop is dispatched on port 3 in this
615 .Pq Event A1H , Umask 10H
616 Cycles which a Uop is dispatched on port 4 in this
619 .Pq Event A1H , Umask 20H
620 Cycles which a Uop is dispatched on port 5 in this
623 .Pq Event A1H , Umask 40H
624 Cycles which a Uop is dispatched on port 6 in this
627 .Pq Event A1H , Umask 80H
628 Cycles which a Uop is dispatched on port 7 in this
631 .Pq Event A2H , Umask 01H
635 .Pq Event A2H , Umask 04H
638 .Pq Event A2H , Umask 08H
642 .Pq Event A2H , Umask 10H
643 Cycles stalled due to re-order buffer full.
645 .Pq Event A3H , Umask 01H
649 .Pq Event A3H , Umask 02H
653 .Pq Event A3H , Umask 05H
656 .Pq Event A3H , Umask 08H
660 .Pq Event AEH , Umask 01H
664 .Pq Event B0H , Umask 01H
667 .Pq Event B0H , Umask 02H
670 .Pq Event B0H , Umask 04H
674 .Pq Event B0H , Umask 08H
677 .Pq Event B1H , Umask 02H
678 Counts total number of uops to be executed per-core
681 .Pq Event B7H , Umask 01H
684 .Pq Event BBH , Umask 01H
687 .Pq Event BCH , Umask 11H
691 .Pq Event BCH , Umask 21H
695 .Pq Event BCH , Umask 12H
698 .Pq Event BCH , Umask 22H
701 .Pq Event BCH , Umask 14H
704 .Pq Event BCH , Umask 24H
707 .Pq Event BCH , Umask 18H
710 .Pq Event BCH , Umask 28H
713 .Pq Event BDH , Umask 01H
714 DTLB flush attempts of the thread-specific entries.
716 .Pq Event BDH , Umask 20H
719 .Pq Event C0H , Umask 00H
722 .Pq Event C0H , Umask 01H
726 .Pq Event C1H , Umask 08H
727 Number of transitions from AVX-256 to legacy SSE
730 .Pq Event C1H , Umask 10H
731 Number of transitions from SSE to AVX-256 when
734 .Pq Event C1H , Umask 40H
738 .Pq Event C2H , Umask 01H
739 Counts the number of micro-ops retired, Use
743 .Pq Event C2H , Umask 02H
747 .Pq Event C3H , Umask 02H
751 .Pq Event C3H , Umask 04H
752 Number of self-modifying-code machine clears
755 .Pq Event C3H , Umask 20H
760 .Pq Event C4H , Umask 00H
763 .Pq Event C4H , Umask 01H
767 .Pq Event C4H , Umask 02H
770 .Pq Event C4H , Umask 04H
773 .Pq Event C4H , Umask 08H
777 .Pq Event C4H , Umask 10H
781 .Pq Event C4H , Umask 20H
784 .Pq Event C4H , Umask 40H
787 .Pq Event C5H , Umask 00H
790 .Pq Event C5H , Umask 01H
793 .Pq Event C5H , Umask 04H
796 .Pq Event CAH , Umask 02H
799 .Pq Event CAH , Umask 04H
802 .Pq Event CAH , Umask 08H
805 .Pq Event CAH , Umask 10H
811 .Pq Event CCH , Umask 20H
814 .Pq Event CDH , Umask 01H
815 Randomly sampled loads whose latency is above a
817 A small fraction of the overall loads are sampled due to randomization.
819 .Pq Event D0H , Umask 11H
822 .Pq Event D0H , Umask 12H
825 .Pq Event D0H , Umask 41H
826 Count retired load uops that were split across a cache line.
828 .Pq Event D0H , Umask 42H
829 Count retired store uops that were split across a cache line.
831 .Pq Event D0H , Umask 81H
834 .Pq Event D0H , Umask 82H
837 .Pq Event D1H , Umask 01H
840 .Pq Event D1H , Umask 02H
843 .Pq Event D1H , Umask 04H
847 .Pq Event D1H , Umask 10H
851 .Pq Event D1H , Umask 40H
856 .Pq Event D2H , Umask 01H
858 and cross-core snoop missed in on-pkg core cache.
860 .Pq Event D2H , Umask 02H
862 cross-core snoop hits in on-pkg core cache.
864 .Pq Event D2H , Umask 04H
868 .Pq Event D2H , Umask 08H
872 .Pq Event D3H , Umask 01H
877 Number of front end re-steers due to BPU
880 .Pq Event F0H , Umask 01H
883 .Pq Event F0H , Umask 02H
886 .Pq Event F0H , Umask 04H
889 .Pq Event F0H , Umask 08H
893 .Pq Event F0H , Umask 10H
896 .Pq Event F0H , Umask 20H
899 .Pq Event F0H , Umask 40H
902 .Pq Event F0H , Umask 80H
905 .Pq Event F1H , Umask 01H
908 .Pq Event F1H , Umask 02H
911 .Pq Event F1H , Umask 04H
914 .Pq Event F1H , Umask 07H
917 .Pq Event F2H , Umask 05H
920 .Pq Event F2H , Umask 06H