Lines Matching +full:a +full:- +full:h

15 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
49 Programmable counters that may be configured to count one of a defined
59 .%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual"
60 .%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C"
61 .%N "Order Number: 325462-045US"
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Bl -tag -width indent
89 Configure the Off-core Response bits.
90 .Bl -tag -width indent
98 requests generated by a write to data cacheline.
128 M-state initial lookup stat in L3.
130 E-state.
132 S-state.
134 F-state.
138 No details on snoop-related information.
142 A snoop was needed and it missed all snooped caches:
147 A snoop was needed and it hits in at least one snooped cache.
148 Hit denotes a cache-line was valid before snoop effect.
155 A snoop was needed and data was forwarded from a remote socket.
159 A snoop was needed and it HitM-ed in local or remote cache.
160 HitM denotes a cache-line was in modified state before effect as a results of snoop.
166 Target was non-DRAM system address.
171 events measured in a cycle is greater than or equal to
174 Configure the PMC to count the number of de-asserted to asserted
176 If specified, the counter will increment only once whenever a
201 .Bl -tag -width indent
203 .Pq Event 03H , Umask 02H
207 .Pq Event 05H , Umask 01H
208 Speculative cache-line split load uops dispatched to
211 .Pq Event 05H , Umask 02H
212 Speculative cache-line split Store-address uops
215 .Pq Event 07H , Umask 01H
219 .Pq Event 08H , Umask 01H
220 Misses in all TLB levels that cause a page walk of any
223 .Pq Event 08H , Umask 02H
227 .Pq Event 08H , Umask 02H
231 .Pq Event 08H , Umask 0EH
235 .Pq Event 08H , Umask 10H
236 Cycle PMH is busy with a walk.
238 .Pq Event 08H , Umask 20H
241 .Pq Event 08H , Umask 40H
244 .Pq Event 08H , Umask 60H
248 .Pq Event 08H , Umask 80H
249 DTLB demand load misses with low part of linear-to-
252 .Pq Event 0DH , Umask 03H
257 .Pq Event 0EH , Umask 01H
263 .Pq Event 0EH , Umask 10H
264 Number of flags-merge uops allocated.
267 .Pq Event 0EH , Umask 20H
270 regardless if as a result of LEA instruction or not.
272 .Pq Event 0EH , Umask 40H
276 .Pq Event 24H , Umask 21H
280 .Pq Event 24H , Umask 41H
283 .Pq Event 24H , Umask E1H
287 .Pq Event 24H , Umask 42H
291 .Pq Event 24H , Umask 22H
295 .Pq Event 24H , Umask E2H
298 .Pq Event 24H , Umask 44H
301 .Pq Event 24H , Umask 24H
305 .Pq Event 24H , Umask 27H
308 .Pq Event 24H , Umask E7H
311 .Pq Event 24H , Umask E4H
314 .Pq Event 24H , Umask 50H
317 .Pq Event 24H , Umask 30H
321 .Pq Event 24H , Umask F8H
324 .Pq Event 24H , Umask 3FH
327 .Pq Event 24H , Umask FFH
330 .Pq Event 27H , Umask 50H
335 that reference a cache line in the last level cache.
337 .Pq Event 2EH , Umask 41H
341 .Pq Event 3CH , Umask 00H
342 Counts the number of thread cycles while the thread is not in a halt state.
346 .Pq Event 3CH , Umask 01H
350 .Pq Event 48H , Umask 01H
354 .Pq Event 49H , Umask 01H
358 .Pq Event 49H , Umask 02H
362 .Pq Event 49H , Umask 04H
366 .Pq Event 49H , Umask 0EH
370 .Pq Event 49H , Umask 10H
373 .Pq Event 49H , Umask 20H
376 .Pq Event 49H , Umask 40H
379 .Pq Event 49H , Umask 60H
383 .Pq Event 49H , Umask 80H
384 DTLB store misses with low part of linear-to-physical
387 .Pq Event 4CH , Umask 01H
388 Non-SW-prefetch load dispatches that hit fill buffer
391 .Pq Event 4CH , Umask 02H
392 Non-SW-prefetch load dispatches that hit fill buffer
393 allocated for H/W prefetch.
395 .Pq Event 51H , Umask 01H
399 .Pq Event 58H , Umask 04H
403 .Pq Event 58H , Umask 08H
407 .Pq Event 58H , Umask 01H
410 .Pq Event 58H , Umask 02H
414 .Pq Event 5CH , Umask 02H
417 .Pq Event 5CH , Umask 01H
420 .Pq Event 5EH , Umask 01H
423 .Pq Event 60H , Umask 01H
427 .Pq Event 60H , Umask 02H
431 .Pq Event 60H , Umask 04H
435 .Pq Event 60H , Umask 08H
439 .Pq Event 63H , Umask 01H
440 Cycles in which the L1D and L2 are locked, due to a UC lock or split lock.
442 .Pq Event 63H , Umask 02H
445 .Pq Event 79H , Umask 02H
448 .Pq Event 79H , Umask 04H
452 .Pq Event 79H , Umask 08H
457 .Pq Event 79H , Umask 10H
462 .Pq Event 79H , Umask 20H
466 .Pq Event 79H , Umask 30H
470 .Pq Event 79H , Umask 18H
474 .Pq Event 79H , Umask 18H
478 .Pq Event 79H , Umask 24H
482 .Pq Event 79H , Umask 24H
486 .Pq Event 79H , Umask 3CH
489 .Pq Event 80H , Umask 02H
493 .Pq Event 85H , Umask 01H
494 Misses in ITLB that causes a page walk of any page
497 .Pq Event 85H , Umask 02H
501 .Pq Event 85H , Umask 04H
505 .Pq Event 85H , Umask 0EH
508 .Pq Event 85H , Umask 10H
509 Cycle PMH is busy with a walk.
511 .Pq Event 85H , Umask 20H
514 .Pq Event 85H , Umask 40H
517 .Pq Event 85H , Umask 60H
521 .Pq Event 87H , Umask 01H
525 .Pq Event 87H , Umask 04H
528 .Pq Event 88H , Umask 41H
532 .Pq Event 88H , Umask 81H
536 .Pq Event 88H , Umask 82H
540 .Pq Event 88H , Umask 84H
544 .Pq Event 88H , Umask 88H
545 Count indirect near branches that have a return mnemonic.
547 .Pq Event 88H , Umask 90H
551 .Pq Event 88H , Umask A0H
555 .Pq Event 88H , Umask FFH
558 .Pq Event 89H , Umask 41H
561 .Pq Event 89H , Umask 81H
564 .Pq Event 89H , Umask 84H
568 .Pq Event 89H , Umask 88H
569 Count mispredicted indirect near branches that have a return mnemonic.
571 .Pq Event 89H , Umask 90H
575 .Pq Event 89H , Umask A0H
579 .Pq Event 89H , Umask FFH
582 .Pq Event 9CH , Umask 01H
583 Count number of non-delivered uops to RAT per
586 .Pq Event A1H , Umask 01H
587 Cycles which a Uop is dispatched on port 0 in this
590 .Pq Event A1H , Umask 02H
591 Cycles which a Uop is dispatched on port 1 in this
594 .Pq Event A1H , Umask 04H
595 Cycles which a Uop is dispatched on port 2 in this
598 .Pq Event A1H , Umask 08H
599 Cycles which a Uop is dispatched on port 3 in this
602 .Pq Event A1H , Umask 10H
603 Cycles which a Uop is dispatched on port 4 in this
606 .Pq Event A1H , Umask 20H
607 Cycles which a Uop is dispatched on port 5 in this
610 .Pq Event A1H , Umask 40H
611 Cycles which a Uop is dispatched on port 6 in this
614 .Pq Event A1H , Umask 80H
615 Cycles which a Uop is dispatched on port 7 in this
618 .Pq Event A2H , Umask 01H
622 .Pq Event A2H , Umask 04H
625 .Pq Event A2H , Umask 08H
629 .Pq Event A2H , Umask 10H
630 Cycles stalled due to re-order buffer full.
632 .Pq Event A3H , Umask 01H
636 .Pq Event A3H , Umask 02H
640 .Pq Event A3H , Umask 05H
643 .Pq Event A3H , Umask 08H
647 .Pq Event AEH , Umask 01H
651 .Pq Event B0H , Umask 01H
654 .Pq Event B0H , Umask 02H
657 .Pq Event B0H , Umask 04H
661 .Pq Event B0H , Umask 08H
665 .Pq Event B1H , Umask 02H
666 Counts total number of uops to be executed per-core
669 .Pq Event B7H , Umask 01H
672 .Pq Event BBH , Umask 01H
675 .Pq Event BCH , Umask 11H
679 .Pq Event BCH , Umask 21H
683 .Pq Event BCH , Umask 12H
686 .Pq Event BCH , Umask 22H
689 .Pq Event BCH , Umask 14H
692 .Pq Event BCH , Umask 24H
695 .Pq Event BCH , Umask 18H
698 .Pq Event BCH , Umask 28H
701 .Pq Event BDH , Umask 01H
702 DTLB flush attempts of the thread-specific entries.
704 .Pq Event BDH , Umask 20H
707 .Pq Event C0H , Umask 00H
710 .Pq Event C0H , Umask 01H
714 .Pq Event C1H , Umask 08H
715 Number of transitions from AVX-256 to legacy SSE
718 .Pq Event C1H , Umask 10H
719 Number of transitions from SSE to AVX-256 when
722 .Pq Event C1H , Umask 40H
726 .Pq Event C2H , Umask 01H
727 Counts the number of micro-ops retired, Use
731 .Pq Event C2H , Umask 02H
735 .Pq Event C3H , Umask 02H
739 .Pq Event C3H , Umask 04H
740 Number of self-modifying-code machine clears
743 .Pq Event C3H , Umask 20H
748 .Pq Event C4H , Umask 00H
751 .Pq Event C4H , Umask 01H
755 .Pq Event C4H , Umask 02H
758 .Pq Event C4H , Umask 04H
761 .Pq Event C4H , Umask 08H
765 .Pq Event C4H , Umask 10H
769 .Pq Event C4H , Umask 20H
772 .Pq Event C4H , Umask 40H
775 .Pq Event C5H , Umask 00H
778 .Pq Event C5H , Umask 01H
781 .Pq Event C5H , Umask 04H
784 .Pq Event CAH , Umask 02H
787 .Pq Event CAH , Umask 04H
790 .Pq Event CAH , Umask 08H
793 .Pq Event CAH , Umask 10H
799 .Pq Event CCH , Umask 20H
802 .Pq Event CDH , Umask 01H
803 Randomly sampled loads whose latency is above a user defined threshold.
804 A small fraction of the overall loads are sampled due to randomization.
806 .Pq Event D0H , Umask 11H
809 .Pq Event D0H , Umask 12H
812 .Pq Event D0H , Umask 41H
813 Count retired load uops that were split across a cache line.
815 .Pq Event D0H , Umask 42H
816 Count retired store uops that were split across a cache line.
818 .Pq Event D0H , Umask 81H
821 .Pq Event D0H , Umask 82H
824 .Pq Event D1H , Umask 01H
827 .Pq Event D1H , Umask 02H
830 .Pq Event D1H , Umask 04H
834 .Pq Event D1H , Umask 10H
838 .Pq Event D1H , Umask 40H
843 .Pq Event D2H , Umask 01H
845 and cross-core snoop missed in on-pkg core cache.
847 .Pq Event D2H , Umask 02H
849 cross-core snoop hits in on-pkg core cache.
851 .Pq Event D2H , Umask 04H
855 .Pq Event D2H , Umask 08H
859 .Pq Event D3H , Umask 01H
864 Number of front end re-steers due to BPU
867 .Pq Event F0H , Umask 01H
870 .Pq Event F0H , Umask 02H
873 .Pq Event F0H , Umask 04H
876 .Pq Event F0H , Umask 08H
880 .Pq Event F0H , Umask 10H
883 .Pq Event F0H , Umask 20H
886 .Pq Event F0H , Umask 40H
889 .Pq Event F0H , Umask 80H
892 .Pq Event F1H , Umask 01H
895 .Pq Event F1H , Umask 02H
898 .Pq Event F1H , Umask 04H
901 .Pq Event F1H , Umask 07H
904 .Pq Event F2H , Umask 05H
907 .Pq Event F2H , Umask 06H
938 .An -nosplit