Lines Matching full:src3
2076 (ins RC:$src1, x86memop:$src2, u8imm:$src3), asm,
2078 (i8 timm:$src3))))], d>,
2082 (ins RC:$src1, RC:$src2, u8imm:$src3), asm,
2084 (i8 timm:$src3))))], d>,
2090 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2094 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2098 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2102 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2108 "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2111 "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
3994 GR32orGR64:$src2, u8imm:$src3),
3996 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
3997 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
3999 (X86pinsrw VR128:$src1, GR32orGR64:$src2, timm:$src3))]>,
4003 i16mem:$src2, u8imm:$src3),
4005 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4006 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
4009 timm:$src3))]>,
4949 (ins RC:$src1, RC:$src2, u8imm:$src3),
4951 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
4953 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
4954 [(set RC:$dst, (VT (X86PAlignr RC:$src1, RC:$src2, (i8 timm:$src3))))]>,
4958 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
4960 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
4962 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
4965 (i8 timm:$src3))))]>,
5363 (ins VR128:$src1, GR32orGR64:$src2, u8imm:$src3),
5365 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5367 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5369 (X86pinsrb VR128:$src1, GR32orGR64:$src2, timm:$src3))]>,
5372 (ins VR128:$src1, i8mem:$src2, u8imm:$src3),
5374 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5376 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5378 (X86pinsrb VR128:$src1, (extloadi8 addr:$src2), timm:$src3))]>,
5384 def : Pat<(X86pinsrb VR128:$src1, (i32 (anyext (i8 GR8:$src2))), timm:$src3),
5386 GR8:$src2, sub_8bit), timm:$src3)>;
5394 (ins VR128:$src1, GR32:$src2, u8imm:$src3),
5396 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5398 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5400 (v4i32 (insertelt VR128:$src1, GR32:$src2, imm:$src3)))]>,
5403 (ins VR128:$src1, i32mem:$src2, u8imm:$src3),
5405 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5407 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5409 (v4i32 (insertelt VR128:$src1, (loadi32 addr:$src2), imm:$src3)))]>,
5420 (ins VR128:$src1, GR64:$src2, u8imm:$src3),
5422 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5424 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5426 (v2i64 (insertelt VR128:$src1, GR64:$src2, imm:$src3)))]>,
5429 (ins VR128:$src1, i64mem:$src2, u8imm:$src3),
5431 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5433 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5435 (v2i64 (insertelt VR128:$src1, (loadi64 addr:$src2), imm:$src3)))]>,
5451 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
5453 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5455 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5457 (X86insertps VR128:$src1, VR128:$src2, timm:$src3))]>,
5460 (ins VR128:$src1, f32mem:$src2, u8imm:$src3),
5462 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5464 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5468 timm:$src3))]>,
5513 (outs FR32:$dst), (ins FR32:$src1, FR32:$src2, i32u8imm:$src3),
5515 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5520 (outs FR32:$dst), (ins FR32:$src1, f32mem:$src2, i32u8imm:$src3),
5522 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5528 (outs FR64:$dst), (ins FR64:$src1, FR64:$src2, i32u8imm:$src3),
5530 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5535 (outs FR64:$dst), (ins FR64:$src1, f64mem:$src2, i32u8imm:$src3),
5537 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5584 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
5587 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5589 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5590 [(set VR128:$dst, (VT32 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
5594 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2, i32u8imm:$src3),
5597 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5599 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5601 (OpNode VR128:$src1, (sse_load_f32 addr:$src2), timm:$src3))]>,
5607 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
5610 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5612 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5613 [(set VR128:$dst, (VT64 (OpNode VR128:$src1, VR128:$src2, timm:$src3)))]>,
5617 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2, i32u8imm:$src3),
5620 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5622 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5624 (OpNode VR128:$src1, (sse_load_f64 addr:$src2), timm:$src3))]>,
5990 (ins RC:$src1, RC:$src2, u8imm:$src3),
5993 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5995 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5996 [(set RC:$dst, (IntId RC:$src1, RC:$src2, timm:$src3))]>,
5999 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6002 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6004 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6006 (IntId RC:$src1, (memop_frag addr:$src2), timm:$src3))]>,
6017 (ins RC:$src1, RC:$src2, u8imm:$src3),
6020 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6022 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6023 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))]>,
6026 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6029 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6031 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6033 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2), timm:$src3)))]>,
6174 (ins RC:$src1, RC:$src2, u8imm:$src3),
6177 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6179 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6180 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))]>,
6183 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6186 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6188 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6190 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2), timm:$src3)))]>,
6195 def : Pat<(OpVT (OpNode (memop_frag addr:$src2), RC:$src1, timm:$src3)),
6197 (commuteXForm timm:$src3))>;
6233 def : Pat<(X86Blendi (v4i64 VR256:$src1), (v4i64 VR256:$src2), timm:$src3),
6234 (VBLENDPDYrri VR256:$src1, VR256:$src2, timm:$src3)>;
6235 def : Pat<(X86Blendi VR256:$src1, (loadv4i64 addr:$src2), timm:$src3),
6236 (VBLENDPDYrmi VR256:$src1, addr:$src2, timm:$src3)>;
6237 def : Pat<(X86Blendi (loadv4i64 addr:$src2), VR256:$src1, timm:$src3),
6238 (VBLENDPDYrmi VR256:$src1, addr:$src2, (BlendCommuteImm4 timm:$src3))>;
6242 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
6243 (VPBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm2 timm:$src3))>;
6244 def : Pat<(X86Blendi VR128:$src1, (loadv2i64 addr:$src2), timm:$src3),
6245 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm2 timm:$src3))>;
6246 def : Pat<(X86Blendi (loadv2i64 addr:$src2), VR128:$src1, timm:$src3),
6247 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2 timm:$src3))>;
6249 def : Pat<(X86Blendi (v8i32 VR256:$src1), (v8i32 VR256:$src2), timm:$src3),
6250 (VBLENDPSYrri VR256:$src1, VR256:$src2, timm:$src3)>;
6251 def : Pat<(X86Blendi VR256:$src1, (loadv8i32 addr:$src2), timm:$src3),
6252 (VBLENDPSYrmi VR256:$src1, addr:$src2, timm:$src3)>;
6253 def : Pat<(X86Blendi (loadv8i32 addr:$src2), VR256:$src1, timm:$src3),
6254 (VBLENDPSYrmi VR256:$src1, addr:$src2, (BlendCommuteImm8 timm:$src3))>;
6258 def : Pat<(X86Blendi (v4i32 VR128:$src1), (v4i32 VR128:$src2), timm:$src3),
6259 (VPBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm4 timm:$src3))>;
6260 def : Pat<(X86Blendi VR128:$src1, (loadv4i32 addr:$src2), timm:$src3),
6261 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
6262 def : Pat<(X86Blendi (loadv4i32 addr:$src2), VR128:$src1, timm:$src3),
6263 (VPBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
6279 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
6280 (PBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm2 timm:$src3))>;
6281 def : Pat<(X86Blendi VR128:$src1, (memopv2i64 addr:$src2), timm:$src3),
6282 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm2 timm:$src3))>;
6283 def : Pat<(X86Blendi (memopv2i64 addr:$src2), VR128:$src1, timm:$src3),
6284 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2 timm:$src3))>;
6286 def : Pat<(X86Blendi (v4i32 VR128:$src1), (v4i32 VR128:$src2), timm:$src3),
6287 (PBLENDWrri VR128:$src1, VR128:$src2, (BlendScaleImm4 timm:$src3))>;
6288 def : Pat<(X86Blendi VR128:$src1, (memopv4i32 addr:$src2), timm:$src3),
6289 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
6290 def : Pat<(X86Blendi (memopv4i32 addr:$src2), VR128:$src1, timm:$src3),
6291 (PBLENDWrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
6320 (ins RC:$src1, RC:$src2, RC:$src3),
6322 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
6323 [(set RC:$dst, (VT (OpNode RC:$src3, RC:$src2, RC:$src1)))],
6328 (ins RC:$src1, x86memop:$src2, RC:$src3),
6330 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
6332 (OpNode RC:$src3, (mem_frag addr:$src2),
6338 // RC::$src3
6615 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6616 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6620 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6621 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6633 (ins VR128:$src1, VR128:$src3, u8imm:$src5),
6634 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
6638 (ins VR128:$src1, i128mem:$src3, u8imm:$src5),
6639 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
6651 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6652 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6656 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6657 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
6669 (ins VR128:$src1, VR128:$src3, u8imm:$src5),
6670 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
6674 (ins VR128:$src1, i128mem:$src3, u8imm:$src5),
6675 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
6768 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6769 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6772 (i8 timm:$src3)))]>, TA,
6775 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6776 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6780 (i8 timm:$src3)))]>, TA,
6930 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6931 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6933 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, timm:$src3))]>,
6937 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
6938 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
6941 timm:$src3))]>,
6946 (i8 timm:$src3)),
6948 (PCLMULCommuteImm timm:$src3))>;
6967 (ins RC:$src1, RC:$src2, u8imm:$src3),
6968 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
6970 (IntId RC:$src1, RC:$src2, timm:$src3))]>,
6974 (ins RC:$src1, MemOp:$src2, u8imm:$src3),
6975 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
6977 (IntId RC:$src1, (LdFrag addr:$src2), timm:$src3))]>,
6982 def : Pat<(IntId (LdFrag addr:$src2), RC:$src1, (i8 timm:$src3)),
6984 (PCLMULCommuteImm timm:$src3))>;
7168 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
7169 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7172 (ins VR256:$src1, f256mem:$src2, u8imm:$src3),
7173 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7211 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7212 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7216 (ins VR256:$src1, f128mem:$src2, u8imm:$src3),
7217 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7358 (ins VR128:$src1, VR128:$src2, VR128:$src3),
7359 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7361 VR128:$src2, VR128:$src3)))]>,
7365 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
7366 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7368 (loadv4i32 addr:$src3))))]>,
7375 (ins VR256:$src1, VR256:$src2, VR256:$src3),
7376 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7378 VR256:$src2, VR256:$src3)))]>,
7382 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
7383 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7385 (loadv8i32 addr:$src3))))]>,
7398 (X86vpmaddwd_su VR256:$src2, VR256:$src3))),
7399 (VPDPWSSDYrr VR256:$src1, VR256:$src2, VR256:$src3)>;
7401 (X86vpmaddwd_su VR256:$src2, (load addr:$src3)))),
7402 (VPDPWSSDYrm VR256:$src1, VR256:$src2, addr:$src3)>;
7404 (X86vpmaddwd_su VR128:$src2, VR128:$src3))),
7405 (VPDPWSSDrr VR128:$src1, VR128:$src2, VR128:$src3)>;
7407 (X86vpmaddwd_su VR128:$src2, (load addr:$src3)))),
7408 (VPDPWSSDrm VR128:$src1, VR128:$src2, addr:$src3)>;
7555 (ins RC:$src1, RC:$src2, u8imm:$src3),
7557 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7558 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))]>,
7561 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
7563 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7565 (OpVT (OpNode RC:$src1, (load addr:$src2), timm:$src3)))]>,
7569 def : Pat<(OpVT (OpNode (load addr:$src2), RC:$src1, timm:$src3)),
7571 (commuteXForm timm:$src3))>;
7582 def : Pat<(X86Blendi (v4i64 VR256:$src1), (v4i64 VR256:$src2), timm:$src3),
7583 (VPBLENDDYrri VR256:$src1, VR256:$src2, (BlendScaleImm4 timm:$src3))>;
7584 def : Pat<(X86Blendi VR256:$src1, (loadv4i64 addr:$src2), timm:$src3),
7585 (VPBLENDDYrmi VR256:$src1, addr:$src2, (BlendScaleImm4 timm:$src3))>;
7586 def : Pat<(X86Blendi (loadv4i64 addr:$src2), VR256:$src1, timm:$src3),
7587 (VPBLENDDYrmi VR256:$src1, addr:$src2, (BlendScaleCommuteImm4 timm:$src3))>;
7589 def : Pat<(X86Blendi (v2i64 VR128:$src1), (v2i64 VR128:$src2), timm:$src3),
7590 (VPBLENDDrri VR128:$src1, VR128:$src2, (BlendScaleImm2to4 timm:$src3))>;
7591 def : Pat<(X86Blendi VR128:$src1, (loadv2i64 addr:$src2), timm:$src3),
7592 (VPBLENDDrmi VR128:$src1, addr:$src2, (BlendScaleImm2to4 timm:$src3))>;
7593 def : Pat<(X86Blendi (loadv2i64 addr:$src2), VR128:$src1, timm:$src3),
7594 (VPBLENDDrmi VR128:$src1, addr:$src2, (BlendScaleCommuteImm2to4 timm:$src3))>;
7865 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
7866 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7869 (ins VR256:$src1, f256mem:$src2, u8imm:$src3),
7870 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", []>,
7887 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7888 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7892 (ins VR256:$src1, i128mem:$src2, u8imm:$src3),
7893 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8130 OpStr#"\t{$src3, $src2, $dst|$dst, $src2, $src3}",
8131 OpStr#"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}") in {
8133 (ins RC:$src1, RC:$src2, u8imm:$src3), "",
8134 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, timm:$src3)))],
8137 (ins RC:$src1, X86MemOp:$src2, u8imm:$src3), "",
8140 timm:$src3)))], SSEPackedInt>,
8186 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8187 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8189 VR128:$src3, VR128:$src1)))]>,
8193 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8194 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8196 (loadv2i64 addr:$src3), VR128:$src1)))]>,
8200 (ins VR256:$src1, VR256:$src2, VR256:$src3),
8201 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8203 VR256:$src3, VR256:$src1)))]>,
8207 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
8208 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8210 (loadv4i64 addr:$src3), VR256:$src1)))]>,
8226 (ins RC:$src1, RC:$src2, RC:$src3),
8227 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8228 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>,
8231 (ins RC:$src1, RC:$src2, X86memop:$src3),
8232 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8234 (MemOpFrag addr:$src3))))]>,
8356 (ins VR256:$src1, VR256:$src2, VR128:$src3),
8357 "vsha512rnds2\t{$src3, $src2, $dst|$dst, $src2, $src3}",
8359 (int_x86_vsha512rnds2 VR256:$src1, VR256:$src2, VR128:$src3))]>,
8367 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8368 !strconcat(OpStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8371 VR128:$src2, VR128:$src3))]>,
8374 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8375 !strconcat(OpStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8378 VR128:$src2, (loadv4i32 addr:$src3)))]>,
8384 (ins VR128:$src1, VR128:$src2, VR128:$src3, i32u8imm:$src4),
8385 "vsm3rnds2\t{$src4, $src3, $src2, $dst|$dst, $src2, $src3, $src4}",
8388 VR128:$src2, VR128:$src3, timm:$src4))]>,
8391 (ins VR128:$src1, VR128:$src2, i128mem:$src3, i32u8imm:$src4),
8392 "vsm3rnds2\t{$src4, $src3, $src2, $dst|$dst, $src2, $src3, $src4}",
8395 VR128:$src2, (loadv4i32 addr:$src3), timm:$src4))]>,
8432 (ins VR128:$src1, VR128:$src2, VR128:$src3),
8433 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8436 VR128:$src1, VR128:$src2, VR128:$src3)))]>,
8440 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
8441 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8444 VR128:$src1, VR128:$src2, (loadv4i32 addr:$src3))))]>,
8449 (ins VR256:$src1, VR256:$src2, VR256:$src3),
8450 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8453 VR256:$src1, VR256:$src2, VR256:$src3)))]>,
8457 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
8458 !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
8461 VR256:$src1, VR256:$src2, (loadv8i32 addr:$src3))))]>,