Lines Matching defs:RISCVOperand
331 struct RISCVOperand final : public MCParsedAsmOperand { struct
333 enum class KindTy {
345 } Kind;
347 struct RegOp {
352 struct ImmOp {
357 struct FPImmOp {
361 struct SysRegOp {
369 struct VTypeOp {
373 struct FRMOp {
377 struct FenceOp {
381 struct RlistOp {
385 struct SpimmOp {
389 struct RegRegOp {
394 SMLoc StartLoc, EndLoc;
395 union {
409 RISCVOperand(KindTy K) : Kind(K) {} in RISCVOperand() argument
412 RISCVOperand(const RISCVOperand &o) : MCParsedAsmOperand() { in RISCVOperand() function
453 bool isToken() const override { return Kind == KindTy::Token; } in isToken()
454 bool isReg() const override { return Kind == KindTy::Register; } in isReg()
455 bool isV0Reg() const { in isV0Reg()
458 bool isAnyReg() const { in isAnyReg()
464 bool isAnyRegC() const { in isAnyRegC()
471 bool isImm() const override { return Kind == KindTy::Immediate; } in isImm()
472 bool isMem() const override { return false; } in isMem()
473 bool isSystemRegister() const { return Kind == KindTy::SystemRegister; } in isSystemRegister()
474 bool isRegReg() const { return Kind == KindTy::RegReg; } in isRegReg()
475 bool isRlist() const { return Kind == KindTy::Rlist; } in isRlist()
476 bool isSpimm() const { return Kind == KindTy::Spimm; } in isSpimm()
478 bool isGPR() const { in isGPR()
483 bool isGPRAsFPR() const { return isGPR() && Reg.IsGPRAsFPR; } in isGPRAsFPR()
485 bool isGPRPair() const { in isGPRPair()
491 static bool evaluateConstantImm(const MCExpr *Expr, int64_t &Imm, in evaluateConstantImm()
509 template <int N> bool isBareSimmNLsb0() const { in isBareSimmNLsb0()
525 bool isBareSymbol() const { in isBareSymbol()
535 bool isCallSymbol() const { in isCallSymbol()
546 bool isPseudoJumpSymbol() const { in isPseudoJumpSymbol()
556 bool isTPRelAddSymbol() const { in isTPRelAddSymbol()
566 bool isTLSDESCCallSymbol() const { in isTLSDESCCallSymbol()
576 bool isCSRSystemRegister() const { return isSystemRegister(); } in isCSRSystemRegister()
578 bool isVTypeImm(unsigned N) const { in isVTypeImm()
589 bool isVTypeI10() const { in isVTypeI10()
594 bool isVTypeI11() const { in isVTypeI11()
602 bool isFenceArg() const { return Kind == KindTy::Fence; } in isFenceArg()
605 bool isFRMArg() const { return Kind == KindTy::FRM; } in isFRMArg()
606 bool isFRMArgLegacy() const { return Kind == KindTy::FRM; } in isFRMArgLegacy()
607 bool isRTZArg() const { return isFRMArg() && FRM.FRM == RISCVFPRndMode::RTZ; } in isRTZArg()
610 bool isLoadFPImm() const { in isLoadFPImm()
622 bool isImmXLenLI() const { in isImmXLenLI()
643 bool isImmXLenLI_Restricted() const { in isImmXLenLI_Restricted()
654 bool isUImmLog2XLen() const { in isUImmLog2XLen()
665 bool isUImmLog2XLenNonZero() const { in isUImmLog2XLenNonZero()
678 bool isUImmLog2XLenHalf() const { in isUImmLog2XLenHalf()
689 template <unsigned N> bool IsUImm() const { in IsUImm()
698 bool isUImm1() const { return IsUImm<1>(); } in isUImm1()
699 bool isUImm2() const { return IsUImm<2>(); } in isUImm2()
700 bool isUImm3() const { return IsUImm<3>(); } in isUImm3()
701 bool isUImm4() const { return IsUImm<4>(); } in isUImm4()
702 bool isUImm5() const { return IsUImm<5>(); } in isUImm5()
703 bool isUImm6() const { return IsUImm<6>(); } in isUImm6()
704 bool isUImm7() const { return IsUImm<7>(); } in isUImm7()
705 bool isUImm8() const { return IsUImm<8>(); } in isUImm8()
706 bool isUImm16() const { return IsUImm<16>(); } in isUImm16()
707 bool isUImm20() const { return IsUImm<20>(); } in isUImm20()
708 bool isUImm32() const { return IsUImm<32>(); } in isUImm32()
710 bool isUImm8GE32() const { in isUImm8GE32()
720 bool isRnumArg() const { in isRnumArg()
730 bool isRnumArg_0_7() const { in isRnumArg_0_7()
740 bool isRnumArg_1_10() const { in isRnumArg_1_10()
750 bool isRnumArg_2_14() const { in isRnumArg_2_14()
760 bool isSImm5() const { in isSImm5()
770 bool isSImm6() const { in isSImm6()
780 bool isSImm6NonZero() const { in isSImm6NonZero()
791 bool isCLUIImm() const { in isCLUIImm()
802 bool isUImm2Lsb0() const { in isUImm2Lsb0()
812 bool isUImm5Lsb0() const { in isUImm5Lsb0()
822 bool isUImm6Lsb0() const { in isUImm6Lsb0()
832 bool isUImm7Lsb00() const { in isUImm7Lsb00()
842 bool isUImm8Lsb00() const { in isUImm8Lsb00()
852 bool isUImm8Lsb000() const { in isUImm8Lsb000()
862 bool isSImm9Lsb0() const { return isBareSimmNLsb0<9>(); } in isSImm9Lsb0()
864 bool isUImm9Lsb000() const { in isUImm9Lsb000()
874 bool isUImm10Lsb00NonZero() const { in isUImm10Lsb00NonZero()
886 static int64_t fixImmediateForRV32(int64_t Imm, bool IsRV64Imm) { in fixImmediateForRV32()
892 bool isSImm12() const { in isSImm12()
911 bool isSImm12Lsb0() const { return isBareSimmNLsb0<12>(); } in isSImm12Lsb0()
913 bool isSImm12Lsb00000() const { in isSImm12Lsb00000()
923 bool isSImm13Lsb0() const { return isBareSimmNLsb0<13>(); } in isSImm13Lsb0()
925 bool isSImm10Lsb0000NonZero() const { in isSImm10Lsb0000NonZero()
935 bool isUImm20LUI() const { in isUImm20LUI()
953 bool isUImm20AUIPC() const { in isUImm20AUIPC()
977 bool isSImm21Lsb0JAL() const { return isBareSimmNLsb0<21>(); } in isSImm21Lsb0JAL()
979 bool isImmZero() const { in isImmZero()
988 bool isSImm5Plus1() const { in isSImm5Plus1()
1000 SMLoc getStartLoc() const override { return StartLoc; } in getStartLoc()
1002 SMLoc getEndLoc() const override { return EndLoc; } in getEndLoc()
1004 bool isRV64Imm() const { in isRV64Imm()
1009 MCRegister getReg() const override { in getReg()
1014 StringRef getSysReg() const { in getSysReg()
1019 const MCExpr *getImm() const { in getImm()
1024 uint64_t getFPConst() const { in getFPConst()
1029 StringRef getToken() const { in getToken()
1034 unsigned getVType() const { in getVType()
1039 RISCVFPRndMode::RoundingMode getFRM() const { in getFRM()
1044 unsigned getFence() const { in getFence()
1049 void print(raw_ostream &OS) const override { in print()
1104 static std::unique_ptr<RISCVOperand> createToken(StringRef Str, SMLoc S) { in createToken()
1113 createReg(unsigned RegNo, SMLoc S, SMLoc E, bool IsGPRAsFPR = false) { in createReg()
1122 static std::unique_ptr<RISCVOperand> createImm(const MCExpr *Val, SMLoc S, in createImm()
1132 static std::unique_ptr<RISCVOperand> createFPImm(uint64_t Val, SMLoc S) { in createFPImm()
1140 static std::unique_ptr<RISCVOperand> createSysReg(StringRef Str, SMLoc S, in createSysReg()
1152 createFRMArg(RISCVFPRndMode::RoundingMode FRM, SMLoc S) { in createFRMArg()
1160 static std::unique_ptr<RISCVOperand> createFenceArg(unsigned Val, SMLoc S) { in createFenceArg()
1168 static std::unique_ptr<RISCVOperand> createVType(unsigned VTypeI, SMLoc S) { in createVType()
1176 static std::unique_ptr<RISCVOperand> createRlist(unsigned RlistEncode, in createRlist()
1184 static std::unique_ptr<RISCVOperand> createRegReg(unsigned Reg1No, in createRegReg()
1194 static std::unique_ptr<RISCVOperand> createSpimm(unsigned Spimm, SMLoc S) { in createSpimm()
1201 static void addExpr(MCInst &Inst, const MCExpr *Expr, bool IsRV64Imm) { in addExpr()
1215 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
1220 void addImmOperands(MCInst &Inst, unsigned N) const { in addImmOperands()
1225 void addFPImmOperands(MCInst &Inst, unsigned N) const { in addFPImmOperands()
1237 void addFenceArgOperands(MCInst &Inst, unsigned N) const { in addFenceArgOperands()
1242 void addCSRSystemRegisterOperands(MCInst &Inst, unsigned N) const { in addCSRSystemRegisterOperands()
1250 void addVTypeIOperands(MCInst &Inst, unsigned N) const { in addVTypeIOperands()
1264 void addRlistOperands(MCInst &Inst, unsigned N) const { in addRlistOperands()
1269 void addRegRegOperands(MCInst &Inst, unsigned N) const { in addRegRegOperands()
1275 void addSpimmOperands(MCInst &Inst, unsigned N) const { in addSpimmOperands()
1280 void addFRMArgOperands(MCInst &Inst, unsigned N) const { in addFRMArgOperands()