Lines Matching +full:0 +full:x77408000

3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
206 let hasSideEffects = 0, Predicates = [HasExtLASX] in {
208 let mayLoad = 0, mayStore = 0 in {
209 def XVADD_B : LASX3R_XXX<0x740a0000>;
210 def XVADD_H : LASX3R_XXX<0x740a8000>;
211 def XVADD_W : LASX3R_XXX<0x740b0000>;
212 def XVADD_D : LASX3R_XXX<0x740b8000>;
213 def XVADD_Q : LASX3R_XXX<0x752d0000>;
215 def XVSUB_B : LASX3R_XXX<0x740c0000>;
216 def XVSUB_H : LASX3R_XXX<0x740c8000>;
217 def XVSUB_W : LASX3R_XXX<0x740d0000>;
218 def XVSUB_D : LASX3R_XXX<0x740d8000>;
219 def XVSUB_Q : LASX3R_XXX<0x752d8000>;
221 def XVADDI_BU : LASX2RI5_XXI<0x768a0000>;
222 def XVADDI_HU : LASX2RI5_XXI<0x768a8000>;
223 def XVADDI_WU : LASX2RI5_XXI<0x768b0000>;
224 def XVADDI_DU : LASX2RI5_XXI<0x768b8000>;
226 def XVSUBI_BU : LASX2RI5_XXI<0x768c0000>;
227 def XVSUBI_HU : LASX2RI5_XXI<0x768c8000>;
228 def XVSUBI_WU : LASX2RI5_XXI<0x768d0000>;
229 def XVSUBI_DU : LASX2RI5_XXI<0x768d8000>;
231 def XVNEG_B : LASX2R_XX<0x769c3000>;
232 def XVNEG_H : LASX2R_XX<0x769c3400>;
233 def XVNEG_W : LASX2R_XX<0x769c3800>;
234 def XVNEG_D : LASX2R_XX<0x769c3c00>;
236 def XVSADD_B : LASX3R_XXX<0x74460000>;
237 def XVSADD_H : LASX3R_XXX<0x74468000>;
238 def XVSADD_W : LASX3R_XXX<0x74470000>;
239 def XVSADD_D : LASX3R_XXX<0x74478000>;
240 def XVSADD_BU : LASX3R_XXX<0x744a0000>;
241 def XVSADD_HU : LASX3R_XXX<0x744a8000>;
242 def XVSADD_WU : LASX3R_XXX<0x744b0000>;
243 def XVSADD_DU : LASX3R_XXX<0x744b8000>;
245 def XVSSUB_B : LASX3R_XXX<0x74480000>;
246 def XVSSUB_H : LASX3R_XXX<0x74488000>;
247 def XVSSUB_W : LASX3R_XXX<0x74490000>;
248 def XVSSUB_D : LASX3R_XXX<0x74498000>;
249 def XVSSUB_BU : LASX3R_XXX<0x744c0000>;
250 def XVSSUB_HU : LASX3R_XXX<0x744c8000>;
251 def XVSSUB_WU : LASX3R_XXX<0x744d0000>;
252 def XVSSUB_DU : LASX3R_XXX<0x744d8000>;
254 def XVHADDW_H_B : LASX3R_XXX<0x74540000>;
255 def XVHADDW_W_H : LASX3R_XXX<0x74548000>;
256 def XVHADDW_D_W : LASX3R_XXX<0x74550000>;
257 def XVHADDW_Q_D : LASX3R_XXX<0x74558000>;
258 def XVHADDW_HU_BU : LASX3R_XXX<0x74580000>;
259 def XVHADDW_WU_HU : LASX3R_XXX<0x74588000>;
260 def XVHADDW_DU_WU : LASX3R_XXX<0x74590000>;
261 def XVHADDW_QU_DU : LASX3R_XXX<0x74598000>;
263 def XVHSUBW_H_B : LASX3R_XXX<0x74560000>;
264 def XVHSUBW_W_H : LASX3R_XXX<0x74568000>;
265 def XVHSUBW_D_W : LASX3R_XXX<0x74570000>;
266 def XVHSUBW_Q_D : LASX3R_XXX<0x74578000>;
267 def XVHSUBW_HU_BU : LASX3R_XXX<0x745a0000>;
268 def XVHSUBW_WU_HU : LASX3R_XXX<0x745a8000>;
269 def XVHSUBW_DU_WU : LASX3R_XXX<0x745b0000>;
270 def XVHSUBW_QU_DU : LASX3R_XXX<0x745b8000>;
272 def XVADDWEV_H_B : LASX3R_XXX<0x741e0000>;
273 def XVADDWEV_W_H : LASX3R_XXX<0x741e8000>;
274 def XVADDWEV_D_W : LASX3R_XXX<0x741f0000>;
275 def XVADDWEV_Q_D : LASX3R_XXX<0x741f8000>;
276 def XVADDWOD_H_B : LASX3R_XXX<0x74220000>;
277 def XVADDWOD_W_H : LASX3R_XXX<0x74228000>;
278 def XVADDWOD_D_W : LASX3R_XXX<0x74230000>;
279 def XVADDWOD_Q_D : LASX3R_XXX<0x74238000>;
281 def XVSUBWEV_H_B : LASX3R_XXX<0x74200000>;
282 def XVSUBWEV_W_H : LASX3R_XXX<0x74208000>;
283 def XVSUBWEV_D_W : LASX3R_XXX<0x74210000>;
284 def XVSUBWEV_Q_D : LASX3R_XXX<0x74218000>;
285 def XVSUBWOD_H_B : LASX3R_XXX<0x74240000>;
286 def XVSUBWOD_W_H : LASX3R_XXX<0x74248000>;
287 def XVSUBWOD_D_W : LASX3R_XXX<0x74250000>;
288 def XVSUBWOD_Q_D : LASX3R_XXX<0x74258000>;
290 def XVADDWEV_H_BU : LASX3R_XXX<0x742e0000>;
291 def XVADDWEV_W_HU : LASX3R_XXX<0x742e8000>;
292 def XVADDWEV_D_WU : LASX3R_XXX<0x742f0000>;
293 def XVADDWEV_Q_DU : LASX3R_XXX<0x742f8000>;
294 def XVADDWOD_H_BU : LASX3R_XXX<0x74320000>;
295 def XVADDWOD_W_HU : LASX3R_XXX<0x74328000>;
296 def XVADDWOD_D_WU : LASX3R_XXX<0x74330000>;
297 def XVADDWOD_Q_DU : LASX3R_XXX<0x74338000>;
299 def XVSUBWEV_H_BU : LASX3R_XXX<0x74300000>;
300 def XVSUBWEV_W_HU : LASX3R_XXX<0x74308000>;
301 def XVSUBWEV_D_WU : LASX3R_XXX<0x74310000>;
302 def XVSUBWEV_Q_DU : LASX3R_XXX<0x74318000>;
303 def XVSUBWOD_H_BU : LASX3R_XXX<0x74340000>;
304 def XVSUBWOD_W_HU : LASX3R_XXX<0x74348000>;
305 def XVSUBWOD_D_WU : LASX3R_XXX<0x74350000>;
306 def XVSUBWOD_Q_DU : LASX3R_XXX<0x74358000>;
308 def XVADDWEV_H_BU_B : LASX3R_XXX<0x743e0000>;
309 def XVADDWEV_W_HU_H : LASX3R_XXX<0x743e8000>;
310 def XVADDWEV_D_WU_W : LASX3R_XXX<0x743f0000>;
311 def XVADDWEV_Q_DU_D : LASX3R_XXX<0x743f8000>;
312 def XVADDWOD_H_BU_B : LASX3R_XXX<0x74400000>;
313 def XVADDWOD_W_HU_H : LASX3R_XXX<0x74408000>;
314 def XVADDWOD_D_WU_W : LASX3R_XXX<0x74410000>;
315 def XVADDWOD_Q_DU_D : LASX3R_XXX<0x74418000>;
317 def XVAVG_B : LASX3R_XXX<0x74640000>;
318 def XVAVG_H : LASX3R_XXX<0x74648000>;
319 def XVAVG_W : LASX3R_XXX<0x74650000>;
320 def XVAVG_D : LASX3R_XXX<0x74658000>;
321 def XVAVG_BU : LASX3R_XXX<0x74660000>;
322 def XVAVG_HU : LASX3R_XXX<0x74668000>;
323 def XVAVG_WU : LASX3R_XXX<0x74670000>;
324 def XVAVG_DU : LASX3R_XXX<0x74678000>;
325 def XVAVGR_B : LASX3R_XXX<0x74680000>;
326 def XVAVGR_H : LASX3R_XXX<0x74688000>;
327 def XVAVGR_W : LASX3R_XXX<0x74690000>;
328 def XVAVGR_D : LASX3R_XXX<0x74698000>;
329 def XVAVGR_BU : LASX3R_XXX<0x746a0000>;
330 def XVAVGR_HU : LASX3R_XXX<0x746a8000>;
331 def XVAVGR_WU : LASX3R_XXX<0x746b0000>;
332 def XVAVGR_DU : LASX3R_XXX<0x746b8000>;
334 def XVABSD_B : LASX3R_XXX<0x74600000>;
335 def XVABSD_H : LASX3R_XXX<0x74608000>;
336 def XVABSD_W : LASX3R_XXX<0x74610000>;
337 def XVABSD_D : LASX3R_XXX<0x74618000>;
338 def XVABSD_BU : LASX3R_XXX<0x74620000>;
339 def XVABSD_HU : LASX3R_XXX<0x74628000>;
340 def XVABSD_WU : LASX3R_XXX<0x74630000>;
341 def XVABSD_DU : LASX3R_XXX<0x74638000>;
343 def XVADDA_B : LASX3R_XXX<0x745c0000>;
344 def XVADDA_H : LASX3R_XXX<0x745c8000>;
345 def XVADDA_W : LASX3R_XXX<0x745d0000>;
346 def XVADDA_D : LASX3R_XXX<0x745d8000>;
348 def XVMAX_B : LASX3R_XXX<0x74700000>;
349 def XVMAX_H : LASX3R_XXX<0x74708000>;
350 def XVMAX_W : LASX3R_XXX<0x74710000>;
351 def XVMAX_D : LASX3R_XXX<0x74718000>;
352 def XVMAXI_B : LASX2RI5_XXI<0x76900000, simm5>;
353 def XVMAXI_H : LASX2RI5_XXI<0x76908000, simm5>;
354 def XVMAXI_W : LASX2RI5_XXI<0x76910000, simm5>;
355 def XVMAXI_D : LASX2RI5_XXI<0x76918000, simm5>;
356 def XVMAX_BU : LASX3R_XXX<0x74740000>;
357 def XVMAX_HU : LASX3R_XXX<0x74748000>;
358 def XVMAX_WU : LASX3R_XXX<0x74750000>;
359 def XVMAX_DU : LASX3R_XXX<0x74758000>;
360 def XVMAXI_BU : LASX2RI5_XXI<0x76940000>;
361 def XVMAXI_HU : LASX2RI5_XXI<0x76948000>;
362 def XVMAXI_WU : LASX2RI5_XXI<0x76950000>;
363 def XVMAXI_DU : LASX2RI5_XXI<0x76958000>;
365 def XVMIN_B : LASX3R_XXX<0x74720000>;
366 def XVMIN_H : LASX3R_XXX<0x74728000>;
367 def XVMIN_W : LASX3R_XXX<0x74730000>;
368 def XVMIN_D : LASX3R_XXX<0x74738000>;
369 def XVMINI_B : LASX2RI5_XXI<0x76920000, simm5>;
370 def XVMINI_H : LASX2RI5_XXI<0x76928000, simm5>;
371 def XVMINI_W : LASX2RI5_XXI<0x76930000, simm5>;
372 def XVMINI_D : LASX2RI5_XXI<0x76938000, simm5>;
373 def XVMIN_BU : LASX3R_XXX<0x74760000>;
374 def XVMIN_HU : LASX3R_XXX<0x74768000>;
375 def XVMIN_WU : LASX3R_XXX<0x74770000>;
376 def XVMIN_DU : LASX3R_XXX<0x74778000>;
377 def XVMINI_BU : LASX2RI5_XXI<0x76960000>;
378 def XVMINI_HU : LASX2RI5_XXI<0x76968000>;
379 def XVMINI_WU : LASX2RI5_XXI<0x76970000>;
380 def XVMINI_DU : LASX2RI5_XXI<0x76978000>;
382 def XVMUL_B : LASX3R_XXX<0x74840000>;
383 def XVMUL_H : LASX3R_XXX<0x74848000>;
384 def XVMUL_W : LASX3R_XXX<0x74850000>;
385 def XVMUL_D : LASX3R_XXX<0x74858000>;
387 def XVMUH_B : LASX3R_XXX<0x74860000>;
388 def XVMUH_H : LASX3R_XXX<0x74868000>;
389 def XVMUH_W : LASX3R_XXX<0x74870000>;
390 def XVMUH_D : LASX3R_XXX<0x74878000>;
391 def XVMUH_BU : LASX3R_XXX<0x74880000>;
392 def XVMUH_HU : LASX3R_XXX<0x74888000>;
393 def XVMUH_WU : LASX3R_XXX<0x74890000>;
394 def XVMUH_DU : LASX3R_XXX<0x74898000>;
396 def XVMULWEV_H_B : LASX3R_XXX<0x74900000>;
397 def XVMULWEV_W_H : LASX3R_XXX<0x74908000>;
398 def XVMULWEV_D_W : LASX3R_XXX<0x74910000>;
399 def XVMULWEV_Q_D : LASX3R_XXX<0x74918000>;
400 def XVMULWOD_H_B : LASX3R_XXX<0x74920000>;
401 def XVMULWOD_W_H : LASX3R_XXX<0x74928000>;
402 def XVMULWOD_D_W : LASX3R_XXX<0x74930000>;
403 def XVMULWOD_Q_D : LASX3R_XXX<0x74938000>;
404 def XVMULWEV_H_BU : LASX3R_XXX<0x74980000>;
405 def XVMULWEV_W_HU : LASX3R_XXX<0x74988000>;
406 def XVMULWEV_D_WU : LASX3R_XXX<0x74990000>;
407 def XVMULWEV_Q_DU : LASX3R_XXX<0x74998000>;
408 def XVMULWOD_H_BU : LASX3R_XXX<0x749a0000>;
409 def XVMULWOD_W_HU : LASX3R_XXX<0x749a8000>;
410 def XVMULWOD_D_WU : LASX3R_XXX<0x749b0000>;
411 def XVMULWOD_Q_DU : LASX3R_XXX<0x749b8000>;
412 def XVMULWEV_H_BU_B : LASX3R_XXX<0x74a00000>;
413 def XVMULWEV_W_HU_H : LASX3R_XXX<0x74a08000>;
414 def XVMULWEV_D_WU_W : LASX3R_XXX<0x74a10000>;
415 def XVMULWEV_Q_DU_D : LASX3R_XXX<0x74a18000>;
416 def XVMULWOD_H_BU_B : LASX3R_XXX<0x74a20000>;
417 def XVMULWOD_W_HU_H : LASX3R_XXX<0x74a28000>;
418 def XVMULWOD_D_WU_W : LASX3R_XXX<0x74a30000>;
419 def XVMULWOD_Q_DU_D : LASX3R_XXX<0x74a38000>;
421 def XVMADD_B : LASX3R_XXXX<0x74a80000>;
422 def XVMADD_H : LASX3R_XXXX<0x74a88000>;
423 def XVMADD_W : LASX3R_XXXX<0x74a90000>;
424 def XVMADD_D : LASX3R_XXXX<0x74a98000>;
426 def XVMSUB_B : LASX3R_XXXX<0x74aa0000>;
427 def XVMSUB_H : LASX3R_XXXX<0x74aa8000>;
428 def XVMSUB_W : LASX3R_XXXX<0x74ab0000>;
429 def XVMSUB_D : LASX3R_XXXX<0x74ab8000>;
431 def XVMADDWEV_H_B : LASX3R_XXXX<0x74ac0000>;
432 def XVMADDWEV_W_H : LASX3R_XXXX<0x74ac8000>;
433 def XVMADDWEV_D_W : LASX3R_XXXX<0x74ad0000>;
434 def XVMADDWEV_Q_D : LASX3R_XXXX<0x74ad8000>;
435 def XVMADDWOD_H_B : LASX3R_XXXX<0x74ae0000>;
436 def XVMADDWOD_W_H : LASX3R_XXXX<0x74ae8000>;
437 def XVMADDWOD_D_W : LASX3R_XXXX<0x74af0000>;
438 def XVMADDWOD_Q_D : LASX3R_XXXX<0x74af8000>;
439 def XVMADDWEV_H_BU : LASX3R_XXXX<0x74b40000>;
440 def XVMADDWEV_W_HU : LASX3R_XXXX<0x74b48000>;
441 def XVMADDWEV_D_WU : LASX3R_XXXX<0x74b50000>;
442 def XVMADDWEV_Q_DU : LASX3R_XXXX<0x74b58000>;
443 def XVMADDWOD_H_BU : LASX3R_XXXX<0x74b60000>;
444 def XVMADDWOD_W_HU : LASX3R_XXXX<0x74b68000>;
445 def XVMADDWOD_D_WU : LASX3R_XXXX<0x74b70000>;
446 def XVMADDWOD_Q_DU : LASX3R_XXXX<0x74b78000>;
447 def XVMADDWEV_H_BU_B : LASX3R_XXXX<0x74bc0000>;
448 def XVMADDWEV_W_HU_H : LASX3R_XXXX<0x74bc8000>;
449 def XVMADDWEV_D_WU_W : LASX3R_XXXX<0x74bd0000>;
450 def XVMADDWEV_Q_DU_D : LASX3R_XXXX<0x74bd8000>;
451 def XVMADDWOD_H_BU_B : LASX3R_XXXX<0x74be0000>;
452 def XVMADDWOD_W_HU_H : LASX3R_XXXX<0x74be8000>;
453 def XVMADDWOD_D_WU_W : LASX3R_XXXX<0x74bf0000>;
454 def XVMADDWOD_Q_DU_D : LASX3R_XXXX<0x74bf8000>;
456 def XVDIV_B : LASX3R_XXX<0x74e00000>;
457 def XVDIV_H : LASX3R_XXX<0x74e08000>;
458 def XVDIV_W : LASX3R_XXX<0x74e10000>;
459 def XVDIV_D : LASX3R_XXX<0x74e18000>;
460 def XVDIV_BU : LASX3R_XXX<0x74e40000>;
461 def XVDIV_HU : LASX3R_XXX<0x74e48000>;
462 def XVDIV_WU : LASX3R_XXX<0x74e50000>;
463 def XVDIV_DU : LASX3R_XXX<0x74e58000>;
465 def XVMOD_B : LASX3R_XXX<0x74e20000>;
466 def XVMOD_H : LASX3R_XXX<0x74e28000>;
467 def XVMOD_W : LASX3R_XXX<0x74e30000>;
468 def XVMOD_D : LASX3R_XXX<0x74e38000>;
469 def XVMOD_BU : LASX3R_XXX<0x74e60000>;
470 def XVMOD_HU : LASX3R_XXX<0x74e68000>;
471 def XVMOD_WU : LASX3R_XXX<0x74e70000>;
472 def XVMOD_DU : LASX3R_XXX<0x74e78000>;
474 def XVSAT_B : LASX2RI3_XXI<0x77242000>;
475 def XVSAT_H : LASX2RI4_XXI<0x77244000>;
476 def XVSAT_W : LASX2RI5_XXI<0x77248000>;
477 def XVSAT_D : LASX2RI6_XXI<0x77250000>;
478 def XVSAT_BU : LASX2RI3_XXI<0x77282000>;
479 def XVSAT_HU : LASX2RI4_XXI<0x77284000>;
480 def XVSAT_WU : LASX2RI5_XXI<0x77288000>;
481 def XVSAT_DU : LASX2RI6_XXI<0x77290000>;
483 def XVEXTH_H_B : LASX2R_XX<0x769ee000>;
484 def XVEXTH_W_H : LASX2R_XX<0x769ee400>;
485 def XVEXTH_D_W : LASX2R_XX<0x769ee800>;
486 def XVEXTH_Q_D : LASX2R_XX<0x769eec00>;
487 def XVEXTH_HU_BU : LASX2R_XX<0x769ef000>;
488 def XVEXTH_WU_HU : LASX2R_XX<0x769ef400>;
489 def XVEXTH_DU_WU : LASX2R_XX<0x769ef800>;
490 def XVEXTH_QU_DU : LASX2R_XX<0x769efc00>;
492 def VEXT2XV_H_B : LASX2R_XX<0x769f1000>;
493 def VEXT2XV_W_B : LASX2R_XX<0x769f1400>;
494 def VEXT2XV_D_B : LASX2R_XX<0x769f1800>;
495 def VEXT2XV_W_H : LASX2R_XX<0x769f1c00>;
496 def VEXT2XV_D_H : LASX2R_XX<0x769f2000>;
497 def VEXT2XV_D_W : LASX2R_XX<0x769f2400>;
498 def VEXT2XV_HU_BU : LASX2R_XX<0x769f2800>;
499 def VEXT2XV_WU_BU : LASX2R_XX<0x769f2c00>;
500 def VEXT2XV_DU_BU : LASX2R_XX<0x769f3000>;
501 def VEXT2XV_WU_HU : LASX2R_XX<0x769f3400>;
502 def VEXT2XV_DU_HU : LASX2R_XX<0x769f3800>;
503 def VEXT2XV_DU_WU : LASX2R_XX<0x769f3c00>;
505 def XVHSELI_D : LASX2RI5_XXI<0x769f8000>;
507 def XVSIGNCOV_B : LASX3R_XXX<0x752e0000>;
508 def XVSIGNCOV_H : LASX3R_XXX<0x752e8000>;
509 def XVSIGNCOV_W : LASX3R_XXX<0x752f0000>;
510 def XVSIGNCOV_D : LASX3R_XXX<0x752f8000>;
512 def XVMSKLTZ_B : LASX2R_XX<0x769c4000>;
513 def XVMSKLTZ_H : LASX2R_XX<0x769c4400>;
514 def XVMSKLTZ_W : LASX2R_XX<0x769c4800>;
515 def XVMSKLTZ_D : LASX2R_XX<0x769c4c00>;
517 def XVMSKGEZ_B : LASX2R_XX<0x769c5000>;
519 def XVMSKNZ_B : LASX2R_XX<0x769c6000>;
521 def XVLDI : LASX1RI13_XI<0x77e00000>;
523 def XVAND_V : LASX3R_XXX<0x75260000>;
524 def XVOR_V : LASX3R_XXX<0x75268000>;
525 def XVXOR_V : LASX3R_XXX<0x75270000>;
526 def XVNOR_V : LASX3R_XXX<0x75278000>;
527 def XVANDN_V : LASX3R_XXX<0x75280000>;
528 def XVORN_V : LASX3R_XXX<0x75288000>;
530 def XVANDI_B : LASX2RI8_XXI<0x77d00000>;
531 def XVORI_B : LASX2RI8_XXI<0x77d40000>;
532 def XVXORI_B : LASX2RI8_XXI<0x77d80000>;
533 def XVNORI_B : LASX2RI8_XXI<0x77dc0000>;
535 def XVSLL_B : LASX3R_XXX<0x74e80000>;
536 def XVSLL_H : LASX3R_XXX<0x74e88000>;
537 def XVSLL_W : LASX3R_XXX<0x74e90000>;
538 def XVSLL_D : LASX3R_XXX<0x74e98000>;
539 def XVSLLI_B : LASX2RI3_XXI<0x772c2000>;
540 def XVSLLI_H : LASX2RI4_XXI<0x772c4000>;
541 def XVSLLI_W : LASX2RI5_XXI<0x772c8000>;
542 def XVSLLI_D : LASX2RI6_XXI<0x772d0000>;
544 def XVSRL_B : LASX3R_XXX<0x74ea0000>;
545 def XVSRL_H : LASX3R_XXX<0x74ea8000>;
546 def XVSRL_W : LASX3R_XXX<0x74eb0000>;
547 def XVSRL_D : LASX3R_XXX<0x74eb8000>;
548 def XVSRLI_B : LASX2RI3_XXI<0x77302000>;
549 def XVSRLI_H : LASX2RI4_XXI<0x77304000>;
550 def XVSRLI_W : LASX2RI5_XXI<0x77308000>;
551 def XVSRLI_D : LASX2RI6_XXI<0x77310000>;
553 def XVSRA_B : LASX3R_XXX<0x74ec0000>;
554 def XVSRA_H : LASX3R_XXX<0x74ec8000>;
555 def XVSRA_W : LASX3R_XXX<0x74ed0000>;
556 def XVSRA_D : LASX3R_XXX<0x74ed8000>;
557 def XVSRAI_B : LASX2RI3_XXI<0x77342000>;
558 def XVSRAI_H : LASX2RI4_XXI<0x77344000>;
559 def XVSRAI_W : LASX2RI5_XXI<0x77348000>;
560 def XVSRAI_D : LASX2RI6_XXI<0x77350000>;
562 def XVROTR_B : LASX3R_XXX<0x74ee0000>;
563 def XVROTR_H : LASX3R_XXX<0x74ee8000>;
564 def XVROTR_W : LASX3R_XXX<0x74ef0000>;
565 def XVROTR_D : LASX3R_XXX<0x74ef8000>;
566 def XVROTRI_B : LASX2RI3_XXI<0x76a02000>;
567 def XVROTRI_H : LASX2RI4_XXI<0x76a04000>;
568 def XVROTRI_W : LASX2RI5_XXI<0x76a08000>;
569 def XVROTRI_D : LASX2RI6_XXI<0x76a10000>;
571 def XVSLLWIL_H_B : LASX2RI3_XXI<0x77082000>;
572 def XVSLLWIL_W_H : LASX2RI4_XXI<0x77084000>;
573 def XVSLLWIL_D_W : LASX2RI5_XXI<0x77088000>;
574 def XVEXTL_Q_D : LASX2R_XX<0x77090000>;
575 def XVSLLWIL_HU_BU : LASX2RI3_XXI<0x770c2000>;
576 def XVSLLWIL_WU_HU : LASX2RI4_XXI<0x770c4000>;
577 def XVSLLWIL_DU_WU : LASX2RI5_XXI<0x770c8000>;
578 def XVEXTL_QU_DU : LASX2R_XX<0x770d0000>;
580 def XVSRLR_B : LASX3R_XXX<0x74f00000>;
581 def XVSRLR_H : LASX3R_XXX<0x74f08000>;
582 def XVSRLR_W : LASX3R_XXX<0x74f10000>;
583 def XVSRLR_D : LASX3R_XXX<0x74f18000>;
584 def XVSRLRI_B : LASX2RI3_XXI<0x76a42000>;
585 def XVSRLRI_H : LASX2RI4_XXI<0x76a44000>;
586 def XVSRLRI_W : LASX2RI5_XXI<0x76a48000>;
587 def XVSRLRI_D : LASX2RI6_XXI<0x76a50000>;
589 def XVSRAR_B : LASX3R_XXX<0x74f20000>;
590 def XVSRAR_H : LASX3R_XXX<0x74f28000>;
591 def XVSRAR_W : LASX3R_XXX<0x74f30000>;
592 def XVSRAR_D : LASX3R_XXX<0x74f38000>;
593 def XVSRARI_B : LASX2RI3_XXI<0x76a82000>;
594 def XVSRARI_H : LASX2RI4_XXI<0x76a84000>;
595 def XVSRARI_W : LASX2RI5_XXI<0x76a88000>;
596 def XVSRARI_D : LASX2RI6_XXI<0x76a90000>;
598 def XVSRLN_B_H : LASX3R_XXX<0x74f48000>;
599 def XVSRLN_H_W : LASX3R_XXX<0x74f50000>;
600 def XVSRLN_W_D : LASX3R_XXX<0x74f58000>;
601 def XVSRAN_B_H : LASX3R_XXX<0x74f68000>;
602 def XVSRAN_H_W : LASX3R_XXX<0x74f70000>;
603 def XVSRAN_W_D : LASX3R_XXX<0x74f78000>;
605 def XVSRLNI_B_H : LASX2RI4_XXXI<0x77404000>;
606 def XVSRLNI_H_W : LASX2RI5_XXXI<0x77408000>;
607 def XVSRLNI_W_D : LASX2RI6_XXXI<0x77410000>;
608 def XVSRLNI_D_Q : LASX2RI7_XXXI<0x77420000>;
609 def XVSRANI_B_H : LASX2RI4_XXXI<0x77584000>;
610 def XVSRANI_H_W : LASX2RI5_XXXI<0x77588000>;
611 def XVSRANI_W_D : LASX2RI6_XXXI<0x77590000>;
612 def XVSRANI_D_Q : LASX2RI7_XXXI<0x775a0000>;
614 def XVSRLRN_B_H : LASX3R_XXX<0x74f88000>;
615 def XVSRLRN_H_W : LASX3R_XXX<0x74f90000>;
616 def XVSRLRN_W_D : LASX3R_XXX<0x74f98000>;
617 def XVSRARN_B_H : LASX3R_XXX<0x74fa8000>;
618 def XVSRARN_H_W : LASX3R_XXX<0x74fb0000>;
619 def XVSRARN_W_D : LASX3R_XXX<0x74fb8000>;
621 def XVSRLRNI_B_H : LASX2RI4_XXXI<0x77444000>;
622 def XVSRLRNI_H_W : LASX2RI5_XXXI<0x77448000>;
623 def XVSRLRNI_W_D : LASX2RI6_XXXI<0x77450000>;
624 def XVSRLRNI_D_Q : LASX2RI7_XXXI<0x77460000>;
625 def XVSRARNI_B_H : LASX2RI4_XXXI<0x775c4000>;
626 def XVSRARNI_H_W : LASX2RI5_XXXI<0x775c8000>;
627 def XVSRARNI_W_D : LASX2RI6_XXXI<0x775d0000>;
628 def XVSRARNI_D_Q : LASX2RI7_XXXI<0x775e0000>;
630 def XVSSRLN_B_H : LASX3R_XXX<0x74fc8000>;
631 def XVSSRLN_H_W : LASX3R_XXX<0x74fd0000>;
632 def XVSSRLN_W_D : LASX3R_XXX<0x74fd8000>;
633 def XVSSRAN_B_H : LASX3R_XXX<0x74fe8000>;
634 def XVSSRAN_H_W : LASX3R_XXX<0x74ff0000>;
635 def XVSSRAN_W_D : LASX3R_XXX<0x74ff8000>;
636 def XVSSRLN_BU_H : LASX3R_XXX<0x75048000>;
637 def XVSSRLN_HU_W : LASX3R_XXX<0x75050000>;
638 def XVSSRLN_WU_D : LASX3R_XXX<0x75058000>;
639 def XVSSRAN_BU_H : LASX3R_XXX<0x75068000>;
640 def XVSSRAN_HU_W : LASX3R_XXX<0x75070000>;
641 def XVSSRAN_WU_D : LASX3R_XXX<0x75078000>;
643 def XVSSRLNI_B_H : LASX2RI4_XXXI<0x77484000>;
644 def XVSSRLNI_H_W : LASX2RI5_XXXI<0x77488000>;
645 def XVSSRLNI_W_D : LASX2RI6_XXXI<0x77490000>;
646 def XVSSRLNI_D_Q : LASX2RI7_XXXI<0x774a0000>;
647 def XVSSRANI_B_H : LASX2RI4_XXXI<0x77604000>;
648 def XVSSRANI_H_W : LASX2RI5_XXXI<0x77608000>;
649 def XVSSRANI_W_D : LASX2RI6_XXXI<0x77610000>;
650 def XVSSRANI_D_Q : LASX2RI7_XXXI<0x77620000>;
651 def XVSSRLNI_BU_H : LASX2RI4_XXXI<0x774c4000>;
652 def XVSSRLNI_HU_W : LASX2RI5_XXXI<0x774c8000>;
653 def XVSSRLNI_WU_D : LASX2RI6_XXXI<0x774d0000>;
654 def XVSSRLNI_DU_Q : LASX2RI7_XXXI<0x774e0000>;
655 def XVSSRANI_BU_H : LASX2RI4_XXXI<0x77644000>;
656 def XVSSRANI_HU_W : LASX2RI5_XXXI<0x77648000>;
657 def XVSSRANI_WU_D : LASX2RI6_XXXI<0x77650000>;
658 def XVSSRANI_DU_Q : LASX2RI7_XXXI<0x77660000>;
660 def XVSSRLRN_B_H : LASX3R_XXX<0x75008000>;
661 def XVSSRLRN_H_W : LASX3R_XXX<0x75010000>;
662 def XVSSRLRN_W_D : LASX3R_XXX<0x75018000>;
663 def XVSSRARN_B_H : LASX3R_XXX<0x75028000>;
664 def XVSSRARN_H_W : LASX3R_XXX<0x75030000>;
665 def XVSSRARN_W_D : LASX3R_XXX<0x75038000>;
666 def XVSSRLRN_BU_H : LASX3R_XXX<0x75088000>;
667 def XVSSRLRN_HU_W : LASX3R_XXX<0x75090000>;
668 def XVSSRLRN_WU_D : LASX3R_XXX<0x75098000>;
669 def XVSSRARN_BU_H : LASX3R_XXX<0x750a8000>;
670 def XVSSRARN_HU_W : LASX3R_XXX<0x750b0000>;
671 def XVSSRARN_WU_D : LASX3R_XXX<0x750b8000>;
673 def XVSSRLRNI_B_H : LASX2RI4_XXXI<0x77504000>;
674 def XVSSRLRNI_H_W : LASX2RI5_XXXI<0x77508000>;
675 def XVSSRLRNI_W_D : LASX2RI6_XXXI<0x77510000>;
676 def XVSSRLRNI_D_Q : LASX2RI7_XXXI<0x77520000>;
677 def XVSSRARNI_B_H : LASX2RI4_XXXI<0x77684000>;
678 def XVSSRARNI_H_W : LASX2RI5_XXXI<0x77688000>;
679 def XVSSRARNI_W_D : LASX2RI6_XXXI<0x77690000>;
680 def XVSSRARNI_D_Q : LASX2RI7_XXXI<0x776a0000>;
681 def XVSSRLRNI_BU_H : LASX2RI4_XXXI<0x77544000>;
682 def XVSSRLRNI_HU_W : LASX2RI5_XXXI<0x77548000>;
683 def XVSSRLRNI_WU_D : LASX2RI6_XXXI<0x77550000>;
684 def XVSSRLRNI_DU_Q : LASX2RI7_XXXI<0x77560000>;
685 def XVSSRARNI_BU_H : LASX2RI4_XXXI<0x776c4000>;
686 def XVSSRARNI_HU_W : LASX2RI5_XXXI<0x776c8000>;
687 def XVSSRARNI_WU_D : LASX2RI6_XXXI<0x776d0000>;
688 def XVSSRARNI_DU_Q : LASX2RI7_XXXI<0x776e0000>;
690 def XVCLO_B : LASX2R_XX<0x769c0000>;
691 def XVCLO_H : LASX2R_XX<0x769c0400>;
692 def XVCLO_W : LASX2R_XX<0x769c0800>;
693 def XVCLO_D : LASX2R_XX<0x769c0c00>;
694 def XVCLZ_B : LASX2R_XX<0x769c1000>;
695 def XVCLZ_H : LASX2R_XX<0x769c1400>;
696 def XVCLZ_W : LASX2R_XX<0x769c1800>;
697 def XVCLZ_D : LASX2R_XX<0x769c1c00>;
699 def XVPCNT_B : LASX2R_XX<0x769c2000>;
700 def XVPCNT_H : LASX2R_XX<0x769c2400>;
701 def XVPCNT_W : LASX2R_XX<0x769c2800>;
702 def XVPCNT_D : LASX2R_XX<0x769c2c00>;
704 def XVBITCLR_B : LASX3R_XXX<0x750c0000>;
705 def XVBITCLR_H : LASX3R_XXX<0x750c8000>;
706 def XVBITCLR_W : LASX3R_XXX<0x750d0000>;
707 def XVBITCLR_D : LASX3R_XXX<0x750d8000>;
708 def XVBITCLRI_B : LASX2RI3_XXI<0x77102000>;
709 def XVBITCLRI_H : LASX2RI4_XXI<0x77104000>;
710 def XVBITCLRI_W : LASX2RI5_XXI<0x77108000>;
711 def XVBITCLRI_D : LASX2RI6_XXI<0x77110000>;
713 def XVBITSET_B : LASX3R_XXX<0x750e0000>;
714 def XVBITSET_H : LASX3R_XXX<0x750e8000>;
715 def XVBITSET_W : LASX3R_XXX<0x750f0000>;
716 def XVBITSET_D : LASX3R_XXX<0x750f8000>;
717 def XVBITSETI_B : LASX2RI3_XXI<0x77142000>;
718 def XVBITSETI_H : LASX2RI4_XXI<0x77144000>;
719 def XVBITSETI_W : LASX2RI5_XXI<0x77148000>;
720 def XVBITSETI_D : LASX2RI6_XXI<0x77150000>;
722 def XVBITREV_B : LASX3R_XXX<0x75100000>;
723 def XVBITREV_H : LASX3R_XXX<0x75108000>;
724 def XVBITREV_W : LASX3R_XXX<0x75110000>;
725 def XVBITREV_D : LASX3R_XXX<0x75118000>;
726 def XVBITREVI_B : LASX2RI3_XXI<0x77182000>;
727 def XVBITREVI_H : LASX2RI4_XXI<0x77184000>;
728 def XVBITREVI_W : LASX2RI5_XXI<0x77188000>;
729 def XVBITREVI_D : LASX2RI6_XXI<0x77190000>;
731 def XVFRSTP_B : LASX3R_XXXX<0x752b0000>;
732 def XVFRSTP_H : LASX3R_XXXX<0x752b8000>;
733 def XVFRSTPI_B : LASX2RI5_XXXI<0x769a0000>;
734 def XVFRSTPI_H : LASX2RI5_XXXI<0x769a8000>;
736 def XVFADD_S : LASX3R_XXX<0x75308000>;
737 def XVFADD_D : LASX3R_XXX<0x75310000>;
738 def XVFSUB_S : LASX3R_XXX<0x75328000>;
739 def XVFSUB_D : LASX3R_XXX<0x75330000>;
740 def XVFMUL_S : LASX3R_XXX<0x75388000>;
741 def XVFMUL_D : LASX3R_XXX<0x75390000>;
742 def XVFDIV_S : LASX3R_XXX<0x753a8000>;
743 def XVFDIV_D : LASX3R_XXX<0x753b0000>;
745 def XVFMADD_S : LASX4R_XXXX<0x0a100000>;
746 def XVFMADD_D : LASX4R_XXXX<0x0a200000>;
747 def XVFMSUB_S : LASX4R_XXXX<0x0a500000>;
748 def XVFMSUB_D : LASX4R_XXXX<0x0a600000>;
749 def XVFNMADD_S : LASX4R_XXXX<0x0a900000>;
750 def XVFNMADD_D : LASX4R_XXXX<0x0aa00000>;
751 def XVFNMSUB_S : LASX4R_XXXX<0x0ad00000>;
752 def XVFNMSUB_D : LASX4R_XXXX<0x0ae00000>;
754 def XVFMAX_S : LASX3R_XXX<0x753c8000>;
755 def XVFMAX_D : LASX3R_XXX<0x753d0000>;
756 def XVFMIN_S : LASX3R_XXX<0x753e8000>;
757 def XVFMIN_D : LASX3R_XXX<0x753f0000>;
759 def XVFMAXA_S : LASX3R_XXX<0x75408000>;
760 def XVFMAXA_D : LASX3R_XXX<0x75410000>;
761 def XVFMINA_S : LASX3R_XXX<0x75428000>;
762 def XVFMINA_D : LASX3R_XXX<0x75430000>;
764 def XVFLOGB_S : LASX2R_XX<0x769cc400>;
765 def XVFLOGB_D : LASX2R_XX<0x769cc800>;
767 def XVFCLASS_S : LASX2R_XX<0x769cd400>;
768 def XVFCLASS_D : LASX2R_XX<0x769cd800>;
770 def XVFSQRT_S : LASX2R_XX<0x769ce400>;
771 def XVFSQRT_D : LASX2R_XX<0x769ce800>;
772 def XVFRECIP_S : LASX2R_XX<0x769cf400>;
773 def XVFRECIP_D : LASX2R_XX<0x769cf800>;
774 def XVFRSQRT_S : LASX2R_XX<0x769d0400>;
775 def XVFRSQRT_D : LASX2R_XX<0x769d0800>;
776 def XVFRECIPE_S : LASX2R_XX<0x769d1400>;
777 def XVFRECIPE_D : LASX2R_XX<0x769d1800>;
778 def XVFRSQRTE_S : LASX2R_XX<0x769d2400>;
779 def XVFRSQRTE_D : LASX2R_XX<0x769d2800>;
781 def XVFCVTL_S_H : LASX2R_XX<0x769de800>;
782 def XVFCVTH_S_H : LASX2R_XX<0x769dec00>;
783 def XVFCVTL_D_S : LASX2R_XX<0x769df000>;
784 def XVFCVTH_D_S : LASX2R_XX<0x769df400>;
785 def XVFCVT_H_S : LASX3R_XXX<0x75460000>;
786 def XVFCVT_S_D : LASX3R_XXX<0x75468000>;
788 def XVFRINTRNE_S : LASX2R_XX<0x769d7400>;
789 def XVFRINTRNE_D : LASX2R_XX<0x769d7800>;
790 def XVFRINTRZ_S : LASX2R_XX<0x769d6400>;
791 def XVFRINTRZ_D : LASX2R_XX<0x769d6800>;
792 def XVFRINTRP_S : LASX2R_XX<0x769d5400>;
793 def XVFRINTRP_D : LASX2R_XX<0x769d5800>;
794 def XVFRINTRM_S : LASX2R_XX<0x769d4400>;
795 def XVFRINTRM_D : LASX2R_XX<0x769d4800>;
796 def XVFRINT_S : LASX2R_XX<0x769d3400>;
797 def XVFRINT_D : LASX2R_XX<0x769d3800>;
799 def XVFTINTRNE_W_S : LASX2R_XX<0x769e5000>;
800 def XVFTINTRNE_L_D : LASX2R_XX<0x769e5400>;
801 def XVFTINTRZ_W_S : LASX2R_XX<0x769e4800>;
802 def XVFTINTRZ_L_D : LASX2R_XX<0x769e4c00>;
803 def XVFTINTRP_W_S : LASX2R_XX<0x769e4000>;
804 def XVFTINTRP_L_D : LASX2R_XX<0x769e4400>;
805 def XVFTINTRM_W_S : LASX2R_XX<0x769e3800>;
806 def XVFTINTRM_L_D : LASX2R_XX<0x769e3c00>;
807 def XVFTINT_W_S : LASX2R_XX<0x769e3000>;
808 def XVFTINT_L_D : LASX2R_XX<0x769e3400>;
809 def XVFTINTRZ_WU_S : LASX2R_XX<0x769e7000>;
810 def XVFTINTRZ_LU_D : LASX2R_XX<0x769e7400>;
811 def XVFTINT_WU_S : LASX2R_XX<0x769e5800>;
812 def XVFTINT_LU_D : LASX2R_XX<0x769e5c00>;
814 def XVFTINTRNE_W_D : LASX3R_XXX<0x754b8000>;
815 def XVFTINTRZ_W_D : LASX3R_XXX<0x754b0000>;
816 def XVFTINTRP_W_D : LASX3R_XXX<0x754a8000>;
817 def XVFTINTRM_W_D : LASX3R_XXX<0x754a0000>;
818 def XVFTINT_W_D : LASX3R_XXX<0x75498000>;
820 def XVFTINTRNEL_L_S : LASX2R_XX<0x769ea000>;
821 def XVFTINTRNEH_L_S : LASX2R_XX<0x769ea400>;
822 def XVFTINTRZL_L_S : LASX2R_XX<0x769e9800>;
823 def XVFTINTRZH_L_S : LASX2R_XX<0x769e9c00>;
824 def XVFTINTRPL_L_S : LASX2R_XX<0x769e9000>;
825 def XVFTINTRPH_L_S : LASX2R_XX<0x769e9400>;
826 def XVFTINTRML_L_S : LASX2R_XX<0x769e8800>;
827 def XVFTINTRMH_L_S : LASX2R_XX<0x769e8c00>;
828 def XVFTINTL_L_S : LASX2R_XX<0x769e8000>;
829 def XVFTINTH_L_S : LASX2R_XX<0x769e8400>;
831 def XVFFINT_S_W : LASX2R_XX<0x769e0000>;
832 def XVFFINT_D_L : LASX2R_XX<0x769e0800>;
833 def XVFFINT_S_WU : LASX2R_XX<0x769e0400>;
834 def XVFFINT_D_LU : LASX2R_XX<0x769e0c00>;
835 def XVFFINTL_D_W : LASX2R_XX<0x769e1000>;
836 def XVFFINTH_D_W : LASX2R_XX<0x769e1400>;
837 def XVFFINT_S_L : LASX3R_XXX<0x75480000>;
839 def XVSEQ_B : LASX3R_XXX<0x74000000>;
840 def XVSEQ_H : LASX3R_XXX<0x74008000>;
841 def XVSEQ_W : LASX3R_XXX<0x74010000>;
842 def XVSEQ_D : LASX3R_XXX<0x74018000>;
843 def XVSEQI_B : LASX2RI5_XXI<0x76800000, simm5>;
844 def XVSEQI_H : LASX2RI5_XXI<0x76808000, simm5>;
845 def XVSEQI_W : LASX2RI5_XXI<0x76810000, simm5>;
846 def XVSEQI_D : LASX2RI5_XXI<0x76818000, simm5>;
848 def XVSLE_B : LASX3R_XXX<0x74020000>;
849 def XVSLE_H : LASX3R_XXX<0x74028000>;
850 def XVSLE_W : LASX3R_XXX<0x74030000>;
851 def XVSLE_D : LASX3R_XXX<0x74038000>;
852 def XVSLEI_B : LASX2RI5_XXI<0x76820000, simm5>;
853 def XVSLEI_H : LASX2RI5_XXI<0x76828000, simm5>;
854 def XVSLEI_W : LASX2RI5_XXI<0x76830000, simm5>;
855 def XVSLEI_D : LASX2RI5_XXI<0x76838000, simm5>;
857 def XVSLE_BU : LASX3R_XXX<0x74040000>;
858 def XVSLE_HU : LASX3R_XXX<0x74048000>;
859 def XVSLE_WU : LASX3R_XXX<0x74050000>;
860 def XVSLE_DU : LASX3R_XXX<0x74058000>;
861 def XVSLEI_BU : LASX2RI5_XXI<0x76840000>;
862 def XVSLEI_HU : LASX2RI5_XXI<0x76848000>;
863 def XVSLEI_WU : LASX2RI5_XXI<0x76850000>;
864 def XVSLEI_DU : LASX2RI5_XXI<0x76858000>;
866 def XVSLT_B : LASX3R_XXX<0x74060000>;
867 def XVSLT_H : LASX3R_XXX<0x74068000>;
868 def XVSLT_W : LASX3R_XXX<0x74070000>;
869 def XVSLT_D : LASX3R_XXX<0x74078000>;
870 def XVSLTI_B : LASX2RI5_XXI<0x76860000, simm5>;
871 def XVSLTI_H : LASX2RI5_XXI<0x76868000, simm5>;
872 def XVSLTI_W : LASX2RI5_XXI<0x76870000, simm5>;
873 def XVSLTI_D : LASX2RI5_XXI<0x76878000, simm5>;
875 def XVSLT_BU : LASX3R_XXX<0x74080000>;
876 def XVSLT_HU : LASX3R_XXX<0x74088000>;
877 def XVSLT_WU : LASX3R_XXX<0x74090000>;
878 def XVSLT_DU : LASX3R_XXX<0x74098000>;
879 def XVSLTI_BU : LASX2RI5_XXI<0x76880000>;
880 def XVSLTI_HU : LASX2RI5_XXI<0x76888000>;
881 def XVSLTI_WU : LASX2RI5_XXI<0x76890000>;
882 def XVSLTI_DU : LASX2RI5_XXI<0x76898000>;
884 def XVFCMP_CAF_S : LASX3R_XXX<0x0c900000>;
885 def XVFCMP_SAF_S : LASX3R_XXX<0x0c908000>;
886 def XVFCMP_CLT_S : LASX3R_XXX<0x0c910000>;
887 def XVFCMP_SLT_S : LASX3R_XXX<0x0c918000>;
888 def XVFCMP_CEQ_S : LASX3R_XXX<0x0c920000>;
889 def XVFCMP_SEQ_S : LASX3R_XXX<0x0c928000>;
890 def XVFCMP_CLE_S : LASX3R_XXX<0x0c930000>;
891 def XVFCMP_SLE_S : LASX3R_XXX<0x0c938000>;
892 def XVFCMP_CUN_S : LASX3R_XXX<0x0c940000>;
893 def XVFCMP_SUN_S : LASX3R_XXX<0x0c948000>;
894 def XVFCMP_CULT_S : LASX3R_XXX<0x0c950000>;
895 def XVFCMP_SULT_S : LASX3R_XXX<0x0c958000>;
896 def XVFCMP_CUEQ_S : LASX3R_XXX<0x0c960000>;
897 def XVFCMP_SUEQ_S : LASX3R_XXX<0x0c968000>;
898 def XVFCMP_CULE_S : LASX3R_XXX<0x0c970000>;
899 def XVFCMP_SULE_S : LASX3R_XXX<0x0c978000>;
900 def XVFCMP_CNE_S : LASX3R_XXX<0x0c980000>;
901 def XVFCMP_SNE_S : LASX3R_XXX<0x0c988000>;
902 def XVFCMP_COR_S : LASX3R_XXX<0x0c9a0000>;
903 def XVFCMP_SOR_S : LASX3R_XXX<0x0c9a8000>;
904 def XVFCMP_CUNE_S : LASX3R_XXX<0x0c9c0000>;
905 def XVFCMP_SUNE_S : LASX3R_XXX<0x0c9c8000>;
907 def XVFCMP_CAF_D : LASX3R_XXX<0x0ca00000>;
908 def XVFCMP_SAF_D : LASX3R_XXX<0x0ca08000>;
909 def XVFCMP_CLT_D : LASX3R_XXX<0x0ca10000>;
910 def XVFCMP_SLT_D : LASX3R_XXX<0x0ca18000>;
911 def XVFCMP_CEQ_D : LASX3R_XXX<0x0ca20000>;
912 def XVFCMP_SEQ_D : LASX3R_XXX<0x0ca28000>;
913 def XVFCMP_CLE_D : LASX3R_XXX<0x0ca30000>;
914 def XVFCMP_SLE_D : LASX3R_XXX<0x0ca38000>;
915 def XVFCMP_CUN_D : LASX3R_XXX<0x0ca40000>;
916 def XVFCMP_SUN_D : LASX3R_XXX<0x0ca48000>;
917 def XVFCMP_CULT_D : LASX3R_XXX<0x0ca50000>;
918 def XVFCMP_SULT_D : LASX3R_XXX<0x0ca58000>;
919 def XVFCMP_CUEQ_D : LASX3R_XXX<0x0ca60000>;
920 def XVFCMP_SUEQ_D : LASX3R_XXX<0x0ca68000>;
921 def XVFCMP_CULE_D : LASX3R_XXX<0x0ca70000>;
922 def XVFCMP_SULE_D : LASX3R_XXX<0x0ca78000>;
923 def XVFCMP_CNE_D : LASX3R_XXX<0x0ca80000>;
924 def XVFCMP_SNE_D : LASX3R_XXX<0x0ca88000>;
925 def XVFCMP_COR_D : LASX3R_XXX<0x0caa0000>;
926 def XVFCMP_SOR_D : LASX3R_XXX<0x0caa8000>;
927 def XVFCMP_CUNE_D : LASX3R_XXX<0x0cac0000>;
928 def XVFCMP_SUNE_D : LASX3R_XXX<0x0cac8000>;
930 def XVBITSEL_V : LASX4R_XXXX<0x0d200000>;
932 def XVBITSELI_B : LASX2RI8_XXXI<0x77c40000>;
934 def XVSETEQZ_V : LASX2R_CX<0x769c9800>;
935 def XVSETNEZ_V : LASX2R_CX<0x769c9c00>;
936 def XVSETANYEQZ_B : LASX2R_CX<0x769ca000>;
937 def XVSETANYEQZ_H : LASX2R_CX<0x769ca400>;
938 def XVSETANYEQZ_W : LASX2R_CX<0x769ca800>;
939 def XVSETANYEQZ_D : LASX2R_CX<0x769cac00>;
940 def XVSETALLNEZ_B : LASX2R_CX<0x769cb000>;
941 def XVSETALLNEZ_H : LASX2R_CX<0x769cb400>;
942 def XVSETALLNEZ_W : LASX2R_CX<0x769cb800>;
943 def XVSETALLNEZ_D : LASX2R_CX<0x769cbc00>;
945 def XVINSGR2VR_W : LASX2RI3_XXRI<0x76ebc000>;
946 def XVINSGR2VR_D : LASX2RI2_XXRI<0x76ebe000>;
947 def XVPICKVE2GR_W : LASX2RI3_RXI<0x76efc000>;
948 def XVPICKVE2GR_D : LASX2RI2_RXI<0x76efe000>;
949 def XVPICKVE2GR_WU : LASX2RI3_RXI<0x76f3c000>;
950 def XVPICKVE2GR_DU : LASX2RI2_RXI<0x76f3e000>;
952 def XVREPLGR2VR_B : LASX2R_XR<0x769f0000>;
953 def XVREPLGR2VR_H : LASX2R_XR<0x769f0400>;
954 def XVREPLGR2VR_W : LASX2R_XR<0x769f0800>;
955 def XVREPLGR2VR_D : LASX2R_XR<0x769f0c00>;
957 def XVREPLVE_B : LASX3R_XXR<0x75220000>;
958 def XVREPLVE_H : LASX3R_XXR<0x75228000>;
959 def XVREPLVE_W : LASX3R_XXR<0x75230000>;
960 def XVREPLVE_D : LASX3R_XXR<0x75238000>;
961 def XVREPL128VEI_B : LASX2RI4_XXI<0x76f78000>;
962 def XVREPL128VEI_H : LASX2RI3_XXI<0x76f7c000>;
963 def XVREPL128VEI_W : LASX2RI2_XXI<0x76f7e000>;
964 def XVREPL128VEI_D : LASX2RI1_XXI<0x76f7f000>;
966 def XVREPLVE0_B : LASX2R_XX<0x77070000>;
967 def XVREPLVE0_H : LASX2R_XX<0x77078000>;
968 def XVREPLVE0_W : LASX2R_XX<0x7707c000>;
969 def XVREPLVE0_D : LASX2R_XX<0x7707e000>;
970 def XVREPLVE0_Q : LASX2R_XX<0x7707f000>;
972 def XVINSVE0_W : LASX2RI3_XXXI<0x76ffc000>;
973 def XVINSVE0_D : LASX2RI2_XXXI<0x76ffe000>;
975 def XVPICKVE_W : LASX2RI3_XXI<0x7703c000>;
976 def XVPICKVE_D : LASX2RI2_XXI<0x7703e000>;
978 def XVBSLL_V : LASX2RI5_XXI<0x768e0000>;
979 def XVBSRL_V : LASX2RI5_XXI<0x768e8000>;
981 def XVPACKEV_B : LASX3R_XXX<0x75160000>;
982 def XVPACKEV_H : LASX3R_XXX<0x75168000>;
983 def XVPACKEV_W : LASX3R_XXX<0x75170000>;
984 def XVPACKEV_D : LASX3R_XXX<0x75178000>;
985 def XVPACKOD_B : LASX3R_XXX<0x75180000>;
986 def XVPACKOD_H : LASX3R_XXX<0x75188000>;
987 def XVPACKOD_W : LASX3R_XXX<0x75190000>;
988 def XVPACKOD_D : LASX3R_XXX<0x75198000>;
990 def XVPICKEV_B : LASX3R_XXX<0x751e0000>;
991 def XVPICKEV_H : LASX3R_XXX<0x751e8000>;
992 def XVPICKEV_W : LASX3R_XXX<0x751f0000>;
993 def XVPICKEV_D : LASX3R_XXX<0x751f8000>;
994 def XVPICKOD_B : LASX3R_XXX<0x75200000>;
995 def XVPICKOD_H : LASX3R_XXX<0x75208000>;
996 def XVPICKOD_W : LASX3R_XXX<0x75210000>;
997 def XVPICKOD_D : LASX3R_XXX<0x75218000>;
999 def XVILVL_B : LASX3R_XXX<0x751a0000>;
1000 def XVILVL_H : LASX3R_XXX<0x751a8000>;
1001 def XVILVL_W : LASX3R_XXX<0x751b0000>;
1002 def XVILVL_D : LASX3R_XXX<0x751b8000>;
1003 def XVILVH_B : LASX3R_XXX<0x751c0000>;
1004 def XVILVH_H : LASX3R_XXX<0x751c8000>;
1005 def XVILVH_W : LASX3R_XXX<0x751d0000>;
1006 def XVILVH_D : LASX3R_XXX<0x751d8000>;
1008 def XVSHUF_B : LASX4R_XXXX<0x0d600000>;
1010 def XVSHUF_H : LASX3R_XXXX<0x757a8000>;
1011 def XVSHUF_W : LASX3R_XXXX<0x757b0000>;
1012 def XVSHUF_D : LASX3R_XXXX<0x757b8000>;
1014 def XVPERM_W : LASX3R_XXX<0x757d0000>;
1016 def XVSHUF4I_B : LASX2RI8_XXI<0x77900000>;
1017 def XVSHUF4I_H : LASX2RI8_XXI<0x77940000>;
1018 def XVSHUF4I_W : LASX2RI8_XXI<0x77980000>;
1019 def XVSHUF4I_D : LASX2RI8_XXXI<0x779c0000>;
1021 def XVPERMI_W : LASX2RI8_XXXI<0x77e40000>;
1022 def XVPERMI_D : LASX2RI8_XXI<0x77e80000>;
1023 def XVPERMI_Q : LASX2RI8_XXXI<0x77ec0000>;
1025 def XVEXTRINS_D : LASX2RI8_XXXI<0x77800000>;
1026 def XVEXTRINS_W : LASX2RI8_XXXI<0x77840000>;
1027 def XVEXTRINS_H : LASX2RI8_XXXI<0x77880000>;
1028 def XVEXTRINS_B : LASX2RI8_XXXI<0x778c0000>;
1029 } // mayLoad = 0, mayStore = 0
1031 let mayLoad = 1, mayStore = 0 in {
1032 def XVLD : LASX2RI12_Load<0x2c800000>;
1033 def XVLDX : LASX3R_Load<0x38480000>;
1035 def XVLDREPL_B : LASX2RI12_Load<0x32800000>;
1036 def XVLDREPL_H : LASX2RI11_Load<0x32400000>;
1037 def XVLDREPL_W : LASX2RI10_Load<0x32200000>;
1038 def XVLDREPL_D : LASX2RI9_Load<0x32100000>;
1039 } // mayLoad = 1, mayStore = 0
1041 let mayLoad = 0, mayStore = 1 in {
1042 def XVST : LASX2RI12_Store<0x2cc00000>;
1043 def XVSTX : LASX3R_Store<0x384c0000>;
1045 def XVSTELM_B : LASX2RI8I5_XRII<0x33800000>;
1046 def XVSTELM_H : LASX2RI8I4_XRII<0x33400000, simm8_lsl1>;
1047 def XVSTELM_W : LASX2RI8I3_XRII<0x33200000, simm8_lsl2>;
1048 def XVSTELM_D : LASX2RI8I2_XRII<0x33100000, simm8_lsl3>;
1049 } // mayLoad = 0, mayStore = 1
1051 } // hasSideEffects = 0, Predicates = [HasExtLASX]
1057 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0,
1710           (XVREPLVE0_W (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32))>;
1712           (XVREPLVE0_D (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64))>;
1752           (XVFFINT_D_L (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), v4i32:$vj,
1763           (XVFFINT_D_LU (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), v4i32:$vj,
1774           (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), (VFTINTRZ_W_S v4f32:$vj),
1785           (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), (VFTINTRZ_WU_S v4f32:$vj),
1795           (XVPERMI_Q (SUBREG_TO_REG (i64 0), LSX128:$vd, sub_128),
1796                      (SUBREG_TO_REG (i64 0), LSX128:$vj, sub_128), 2)>;