Lines Matching full:hexagon
1 //===-- HexagonRegisterInfo.cpp - Hexagon Register Information ------------===//
9 // This file contains the Hexagon implementation of the TargetRegisterInfo
15 #include "Hexagon.h"
48 "hexagon-frame-index-search-range", cl::init(32), cl::Hidden,
52 "hexagon-frame-index-reuse-limit", cl::init(~0), cl::Hidden,
57 : HexagonGenRegisterInfo(Hexagon::R31, 0/*DwarfFlavor*/, 0/*EHFlavor*/, in HexagonRegisterInfo()
62 return R == Hexagon::R0 || R == Hexagon::R1 || R == Hexagon::R2 || in isEHReturnCalleeSaveReg()
63 R == Hexagon::R3 || R == Hexagon::D0 || R == Hexagon::D1; in isEHReturnCalleeSaveReg()
69 using namespace Hexagon; in getCallerSavedRegs()
121 Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, in getCalleeSavedRegs()
122 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
123 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0 in getCalleeSavedRegs()
129 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, in getCalleeSavedRegs()
130 Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, in getCalleeSavedRegs()
131 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
132 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0 in getCalleeSavedRegs()
150 Reserved.set(Hexagon::R29); in getReservedRegs()
151 Reserved.set(Hexagon::R30); in getReservedRegs()
152 Reserved.set(Hexagon::R31); in getReservedRegs()
153 Reserved.set(Hexagon::VTMP); in getReservedRegs()
156 Reserved.set(Hexagon::GELR); // G0 in getReservedRegs()
157 Reserved.set(Hexagon::GSR); // G1 in getReservedRegs()
158 Reserved.set(Hexagon::GOSP); // G2 in getReservedRegs()
159 Reserved.set(Hexagon::G3); // G3 in getReservedRegs()
162 Reserved.set(Hexagon::SA0); // C0 in getReservedRegs()
163 Reserved.set(Hexagon::LC0); // C1 in getReservedRegs()
164 Reserved.set(Hexagon::SA1); // C2 in getReservedRegs()
165 Reserved.set(Hexagon::LC1); // C3 in getReservedRegs()
166 Reserved.set(Hexagon::P3_0); // C4 in getReservedRegs()
167 Reserved.set(Hexagon::USR); // C8 in getReservedRegs()
168 Reserved.set(Hexagon::PC); // C9 in getReservedRegs()
169 Reserved.set(Hexagon::UGP); // C10 in getReservedRegs()
170 Reserved.set(Hexagon::GP); // C11 in getReservedRegs()
171 Reserved.set(Hexagon::CS0); // C12 in getReservedRegs()
172 Reserved.set(Hexagon::CS1); // C13 in getReservedRegs()
173 Reserved.set(Hexagon::UPCYCLELO); // C14 in getReservedRegs()
174 Reserved.set(Hexagon::UPCYCLEHI); // C15 in getReservedRegs()
175 Reserved.set(Hexagon::FRAMELIMIT); // C16 in getReservedRegs()
176 Reserved.set(Hexagon::FRAMEKEY); // C17 in getReservedRegs()
177 Reserved.set(Hexagon::PKTCOUNTLO); // C18 in getReservedRegs()
178 Reserved.set(Hexagon::PKTCOUNTHI); // C19 in getReservedRegs()
179 Reserved.set(Hexagon::UTIMERLO); // C30 in getReservedRegs()
180 Reserved.set(Hexagon::UTIMERHI); // C31 in getReservedRegs()
184 Reserved.set(Hexagon::C8); in getReservedRegs()
185 Reserved.set(Hexagon::USR_OVF); in getReservedRegs()
195 Reserved.set(Hexagon::R19); in getReservedRegs()
213 // Hexagon_TODO: Do we need to enforce this for Hexagon? in eliminateFrameIndex()
233 case Hexagon::PS_fia: in eliminateFrameIndex()
234 MI.setDesc(HII.get(Hexagon::A2_addi)); in eliminateFrameIndex()
238 case Hexagon::PS_fi: in eliminateFrameIndex()
240 MI.setDesc(HII.get(Hexagon::A2_addi)); in eliminateFrameIndex()
258 case Hexagon::PS_vloadrw_ai: in eliminateFrameIndex()
259 case Hexagon::PS_vloadrw_nt_ai: in eliminateFrameIndex()
260 case Hexagon::PS_vstorerw_ai: in eliminateFrameIndex()
261 case Hexagon::PS_vstorerw_nt_ai: in eliminateFrameIndex()
264 case Hexagon::PS_vloadrv_ai: in eliminateFrameIndex()
265 case Hexagon::PS_vloadrv_nt_ai: in eliminateFrameIndex()
266 case Hexagon::PS_vstorerv_ai: in eliminateFrameIndex()
267 case Hexagon::PS_vstorerv_nt_ai: in eliminateFrameIndex()
268 case Hexagon::V6_vL32b_ai: in eliminateFrameIndex()
269 case Hexagon::V6_vS32b_ai: { in eliminateFrameIndex()
309 if (BI.getOpcode() != Hexagon::A2_addi) in eliminateFrameIndex()
337 ReuseBP = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in eliminateFrameIndex()
339 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), ReuseBP) in eliminateFrameIndex()
363 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
365 bool SmallSrc = SrcRC->getID() == Hexagon::HvxVRRegClass.getID(); in shouldCoalesce()
366 bool SmallDst = DstRC->getID() == Hexagon::HvxVRRegClass.getID(); in shouldCoalesce()
412 return Hexagon::R30; in getFrameRegister()
417 return Hexagon::R29; in getStackRegister()
423 assert(GenIdx == Hexagon::ps_sub_lo || GenIdx == Hexagon::ps_sub_hi); in getHexagonSubRegIndex()
425 static const unsigned ISub[] = { Hexagon::isub_lo, Hexagon::isub_hi }; in getHexagonSubRegIndex()
426 static const unsigned VSub[] = { Hexagon::vsub_lo, Hexagon::vsub_hi }; in getHexagonSubRegIndex()
427 static const unsigned WSub[] = { Hexagon::wsub_lo, Hexagon::wsub_hi }; in getHexagonSubRegIndex()
430 case Hexagon::CtrRegs64RegClassID: in getHexagonSubRegIndex()
431 case Hexagon::DoubleRegsRegClassID: in getHexagonSubRegIndex()
433 case Hexagon::HvxWRRegClassID: in getHexagonSubRegIndex()
435 case Hexagon::HvxVQRRegClassID: in getHexagonSubRegIndex()
453 return &Hexagon::IntRegsRegClass; in getPointerRegClass()