Lines Matching full:src3
1216 (ins addrmode6:$Rn, DPR:$src1, DPR:$src2, DPR:$src3,
1219 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3", []>, Sched<[WriteVLD2]> {
1254 DPR:$src1, DPR:$src2, DPR:$src3, nohash_imm:$lane),
1257 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $Rn.addr = $wb",
1290 (ins addrmode6:$Rn, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4,
1293 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $src4 = $dst4", []>,
1332 DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4, nohash_imm:$lane),
1335 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $src4 = $dst4, $Rn.addr = $wb",
2023 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3), IIC_VST3,
2024 "vst3", Dt, "\\{$Vd, $src2, $src3\\}, $Rn", "", []>, Sched<[WriteVST3]> {
2042 DPR:$Vd, DPR:$src2, DPR:$src3), IIC_VST3u,
2043 "vst3", Dt, "\\{$Vd, $src2, $src3\\}, $Rn$Rm",
2081 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4),
2082 IIC_VST4, "vst4", Dt, "\\{$Vd, $src2, $src3, $src4\\}, $Rn",
2101 DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4), IIC_VST4u,
2102 "vst4", Dt, "\\{$Vd, $src2, $src3, $src4\\}, $Rn$Rm",
2328 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3,
2330 "\\{$Vd[$lane], $src2[$lane], $src3[$lane]\\}, $Rn", "", []>,
2365 DPR:$Vd, DPR:$src2, DPR:$src3, nohash_imm:$lane),
2367 "\\{$Vd[$lane], $src2[$lane], $src3[$lane]\\}, $Rn$Rm",
2399 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4,
2401 "\\{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\\}, $Rn",
2439 DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4, nohash_imm:$lane),
2441 "\\{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\\}, $Rn$Rm",
4502 (v8i16 (ARMvduplane (v8i16 QPR:$src3), imm:$lane))))),
4504 (v4i16 (EXTRACT_SUBREG QPR:$src3,
4510 (v4i32 (ARMvduplane (v4i32 QPR:$src3), imm:$lane))))),
4512 (v2i32 (EXTRACT_SUBREG QPR:$src3,
4519 (v4f32 (ARMvduplane (v4f32 QPR:$src3), imm:$lane))))),
4522 (v2f32 (EXTRACT_SUBREG QPR:$src3,
4573 (v8i16 (ARMvduplane (v8i16 QPR:$src3),
4578 QPR:$src3,
4583 (v4i32 (ARMvduplane (v4i32 QPR:$src3),
4588 QPR:$src3,
4626 (v8i16 (ARMvduplane (v8i16 QPR:$src3),
4631 QPR:$src3,
4636 (v4i32 (ARMvduplane (v4i32 QPR:$src3),
4641 QPR:$src3,
4704 (v8i16 (ARMvduplane (v8i16 QPR:$src3), imm:$lane))))),
4706 (v4i16 (EXTRACT_SUBREG QPR:$src3,
4712 (v4i32 (ARMvduplane (v4i32 QPR:$src3), imm:$lane))))),
4714 (v2i32 (EXTRACT_SUBREG QPR:$src3,
4721 (v4f32 (ARMvduplane (v4f32 QPR:$src3), imm:$lane))))),
4723 (v2f32 (EXTRACT_SUBREG QPR:$src3,
5613 // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst",
5626 // like VBSL but with: "vbit $dst, $src2, $src1", "$src3 = $dst",
6585 def : Pat<(v2f32 (insertelt DPR:$src1, SPR:$src2, imm:$src3)),
6587 SPR:$src2, (SSubReg_f32_reg imm:$src3))>;
6588 def : Pat<(v4f32 (insertelt QPR:$src1, SPR:$src2, imm:$src3)),
6590 SPR:$src2, (SSubReg_f32_reg imm:$src3))>;
6594 def : Pat<(v2f64 (insertelt QPR:$src1, DPR:$src2, imm:$src3)),
6595 (INSERT_SUBREG QPR:$src1, DPR:$src2, (DSubReg_f64_reg imm:$src3))>;