Lines Matching full:gen
201 class VOP3_Real_Gen <VOP_Pseudo ps, GFXGen Gen, string asm_name = ps.Mnemonic> :
202 VOP3_Real <ps, Gen.Subtarget, asm_name> {
203 let AssemblerPredicate = Gen.AssemblerPredicate;
205 let DecoderNamespace = Gen.DecoderNamespace#
218 class VOP3P_Real_Gen<VOP_Pseudo ps, GFXGen Gen, string asm_name = ps.Mnemonic> :
219 VOP3P_Real<ps, Gen.Subtarget, asm_name> {
220 let AssemblerPredicate = Gen.AssemblerPredicate;
221 let DecoderNamespace = Gen.DecoderNamespace;
1352 class VOP3_DPP16_Gen<bits<10> op, VOP_DPP_Pseudo ps, GFXGen Gen,
1354 VOP3_DPP16 <op, ps, Gen.Subtarget, opName> {
1355 let AssemblerPredicate = Gen.AssemblerPredicate;
1357 let DecoderNamespace = Gen.DecoderNamespace#
1391 multiclass VOP3_Real_Base<GFXGen Gen, bits<10> op, string opName = NAME,
1396 def _e64#Gen.Suffix :
1397 VOP3_Real_Gen<ps, Gen>,
1400 def _e64#Gen.Suffix :
1401 VOP3_Real_Gen<ps, Gen>,
1404 def _e64#Gen.Suffix :
1405 VOP3_Real_Gen<ps, Gen>,
1408 def _e64#Gen.Suffix :
1409 VOP3_Real_Gen<ps, Gen>,
1415 multiclass VOP3Dot_Real_Base<GFXGen Gen, bits<10> op, string opName = NAME,
1419 def _e64#Gen.Suffix :
1420 VOP3_Real_Gen<ps, Gen>,
1425 multiclass VOP3_Real_with_name<GFXGen Gen, bits<10> op, string opName,
1431 def _e64#Gen.Suffix :
1432 VOP3_Real_Gen<ps, Gen>,
1435 def _e64#Gen.Suffix :
1436 VOP3_Real_Gen<ps, Gen>,
1439 def _e64#Gen.Suffix :
1440 VOP3_Real_Gen<ps, Gen>,
1443 def _e64#Gen.Suffix :
1444 VOP3_Real_Gen<ps, Gen>,
1448 def Gen.Suffix#"_VOP3_alias" : LetDummies, AMDGPUMnemonicAlias<ps.Mnemonic, asmName> {
1449 let AssemblerPredicate = Gen.AssemblerPredicate;
1454 multiclass VOP3_Real_No_Suffix<GFXGen Gen, bits<10> op, string opName = NAME> {
1456 def _e64#Gen.Suffix :
1457 VOP3_Real_Gen<ps, Gen>,
1461 multiclass VOP3_Real_dpp_Base<GFXGen Gen, bits<10> op, string opName = NAME> {
1462 def _e64_dpp#Gen.Suffix :
1463 VOP3_DPP16_Gen<op, !cast<VOP_DPP_Pseudo>(opName#"_e64"#"_dpp"), Gen>;
1466 multiclass VOP3Dot_Real_dpp_Base<GFXGen Gen, bits<10> op, string opName = NAME> {
1467 def _e64_dpp#Gen.Suffix :
1468 VOP3_DPP16_Gen<op, !cast<VOP_DPP_Pseudo>(opName#"_e64"#"_dpp"), Gen> {
1474 multiclass VOP3_Real_dpp_with_name<GFXGen Gen, bits<10> op, string opName,
1478 defm NAME : VOP3_Real_dpp_Base<Gen, op, opName>;
1482 multiclass VOP3_Real_dpp8_Base<GFXGen Gen, bits<10> op, string opName = NAME> {
1484 def _e64_dpp8#Gen.Suffix : Base_VOP3_DPP8<op, ps> {
1485 let DecoderNamespace = Gen.DecoderNamespace;
1486 let AssemblerPredicate = Gen.AssemblerPredicate;
1490 multiclass VOP3Dot_Real_dpp8_Base<GFXGen Gen, bits<10> op, string opName = NAME> {
1492 def _e64_dpp8#Gen.Suffix : Base_VOP3_DPP8<op, ps> {
1495 let DecoderNamespace = Gen.DecoderNamespace;
1496 let AssemblerPredicate = Gen.AssemblerPredicate;
1500 multiclass VOP3_Real_dpp8_with_name<GFXGen Gen, bits<10> op, string opName,
1504 DecoderNamespace = Gen.DecoderNamespace#
1508 defm NAME : VOP3_Real_dpp8_Base<Gen, op, opName>;
1512 multiclass VOP3be_Real<GFXGen Gen, bits<10> op, string opName, string asmName,
1516 def _e64#Gen.Suffix :
1517 VOP3_Real_Gen<ps, Gen, asmName>,
1521 multiclass VOP3be_Real_dpp<GFXGen Gen, bits<10> op, string opName,
1525 def _e64_dpp#Gen.Suffix : Base_VOP3b_DPP16<op, dpp_ps, asmName>,
1526 SIMCInstr<dpp_ps.PseudoInstr, Gen.Subtarget> {
1527 let DecoderNamespace = Gen.DecoderNamespace;
1528 let AssemblerPredicate = Gen.AssemblerPredicate;
1532 multiclass VOP3be_Real_dpp8<GFXGen Gen, bits<10> op, string opName,
1535 def _e64_dpp8#Gen.Suffix : VOP3b_DPP8_Base<op, ps, asmName> {
1536 let DecoderNamespace = Gen.DecoderNamespace;
1537 let AssemblerPredicate = Gen.AssemblerPredicate;
1542 multiclass VOP3_Realtriple<GFXGen Gen, bits<10> op, bit isSingle = 0,
1544 VOP3_Real_Base<Gen, op, opName, isSingle>,
1545 VOP3_Real_dpp_Base<Gen, op, opName>,
1546 VOP3_Real_dpp8_Base<Gen, op, opName>;
1548 multiclass VOP3Dot_Realtriple<GFXGen Gen, bits<10> op, bit isSingle = 0,
1550 VOP3Dot_Real_Base<Gen, op, opName, isSingle>,
1551 VOP3Dot_Real_dpp_Base<Gen, op, opName>,
1552 VOP3Dot_Real_dpp8_Base<Gen, op, opName>;
1554 multiclass VOP3Only_Realtriple<GFXGen Gen, bits<10> op> :
1555 VOP3_Realtriple<Gen, op, 1>;
1557 multiclass VOP3_Realtriple_with_name<GFXGen Gen, bits<10> op, string opName,
1559 VOP3_Real_with_name<Gen, op, opName, asmName, isSingle>,
1560 VOP3_Real_dpp_with_name<Gen, op, opName, asmName>,
1561 VOP3_Real_dpp8_with_name<Gen, op, opName, asmName>;
1563 multiclass VOP3Only_Realtriple_with_name<GFXGen Gen, bits<10> op, string opName,
1565 VOP3_Realtriple_with_name<Gen, op, opName, asmName, 1>;
1567 multiclass VOP3Only_Realtriple_t16<GFXGen Gen, bits<10> op, string asmName,
1569 : VOP3Only_Realtriple_with_name<Gen, op, opName, asmName>;
1572 GFXGen Gen, bits<10> op, bit isSingle = 0, string opName = NAME,
1574 VOP3be_Real<Gen, op, opName, asmName, isSingle>,
1575 VOP3be_Real_dpp<Gen, op, opName, asmName>,
1576 VOP3be_Real_dpp8<Gen, op, opName, asmName>;
1578 multiclass VOP3beOnly_Realtriple<GFXGen Gen, bits<10> op> :
1579 VOP3be_Realtriple<Gen, op, 1>;