Lines Matching refs:opName
42 class VOP1_Pseudo <string opName, VOPProfile P, list<dag> pattern=[], bit VOP1Only = 0> :
43 VOP_Pseudo <opName, !if(VOP1Only, "", "_e32"), P, P.Outs32, P.Ins32, "", pattern> {
120 multiclass VOP1Inst <string opName, VOPProfile P,
123 defvar should_mov_imm = !or(!eq(opName, "v_mov_b32"),
124 !eq(opName, "v_mov_b64"));
128 def _e32 : VOP1_Pseudo <opName, P>;
131 def _e32 : VOP1_Pseudo <opName, P>, VOPD_Component<VOPDOp, opName>;
132 def _e64 : VOP3InstBase <opName, P, node>;
136 def _sdwa : VOP1_SDWA_Pseudo <opName, P>;
139 def _dpp : VOP1_DPP_Pseudo <opName, P>;
143 def _e64_dpp : VOP3_DPP_Pseudo <opName, P>;
146 def : LetDummies, AMDGPUMnemonicAlias<opName#"_e32", opName>;
147 def : LetDummies, AMDGPUMnemonicAlias<opName#"_e64", opName>;
150 def : LetDummies, AMDGPUMnemonicAlias<opName#"_sdwa", opName>;
153 def : LetDummies, AMDGPUMnemonicAlias<opName#"_dpp", opName, AMDGPUAsmVariants.DPP>;
156 multiclass VOP1Inst_t16_with_profiles<string opName,
162 defm NAME : VOP1Inst<opName, P, node>;
165 defm _t16 : VOP1Inst<opName#"_t16", P_t16, node>;
168 defm _fake16 : VOP1Inst<opName#"_fake16", P_fake16, node>;
172 multiclass VOP1Inst_t16<string opName, VOPProfile P,
174 VOP1Inst_t16_with_profiles<opName, P, VOPProfile_True16<P>, VOPProfile_Fake16<P>, node>;
817 multiclass VOP1_Real_e32<GFXGen Gen, bits<9> op, string opName = NAME> {
818 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
824 multiclass VOP1_Real_e32_with_name<GFXGen Gen, bits<9> op, string opName,
826 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
830 defm NAME : VOP1_Real_e32<Gen, op, opName>;
840 multiclass VOP1_Real_dpp<GFXGen Gen, bits<9> op, string opName = NAME> {
841 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
842 def _dpp#Gen.Suffix : VOP1_DPP16_Gen<op{7-0}, !cast<VOP1_DPP_Pseudo>(opName#"_dpp"), Gen>;
845 multiclass VOP1_Real_dpp_with_name<GFXGen Gen, bits<9> op, string opName,
847 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
851 defm NAME : VOP1_Real_dpp<Gen, op, opName>;
855 multiclass VOP1_Real_dpp8<GFXGen Gen, bits<9> op, string opName = NAME> {
856 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
860 multiclass VOP1_Real_dpp8_with_name<GFXGen Gen, bits<9> op, string opName,
862 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
866 defm NAME : VOP1_Real_dpp8<Gen, op, opName>;
874 multiclass VOP1_Realtriple_e64_with_name<GFXGen Gen, bits<9> op, string opName,
876 defm NAME : VOP3_Realtriple_with_name<Gen, {0, 1, 1, op{6-0}}, opName,
884 multiclass VOP1_Real_NO_VOP3_with_name_gfx11<bits<9> op, string opName,
886 defm NAME : VOP1_Real_e32_with_name<GFX11Gen, op, opName, asmName>,
887 VOP1_Real_dpp_with_name<GFX11Gen, op, opName, asmName>,
888 VOP1_Real_dpp8_with_name<GFX11Gen, op, opName, asmName>;
889 defvar ps = !cast<VOP1_Pseudo>(opName#"_e32");
895 multiclass VOP1_Real_NO_VOP3_with_name_gfx12<bits<9> op, string opName,
897 defm NAME : VOP1_Real_e32_with_name<GFX12Gen, op, opName, asmName>,
898 VOP1_Real_dpp_with_name<GFX12Gen, op, opName, asmName>,
899 VOP1_Real_dpp8_with_name<GFX12Gen, op, opName, asmName>;
902 multiclass VOP1_Real_FULL_with_name<GFXGen Gen, bits<9> op, string opName,
904 VOP1_Real_e32_with_name<Gen, op, opName, asmName>,
905 VOP1_Real_dpp_with_name<Gen, op, opName, asmName>,
906 VOP1_Real_dpp8_with_name<Gen, op, opName, asmName>,
907 VOP1_Realtriple_e64_with_name<Gen, op, opName, asmName>;
913 string opName = NAME> :
914 VOP1_Real_FULL_with_name<GFX11Gen, op, opName, asmName>,
915 VOP1_Real_FULL_with_name<GFX12Gen, op, opName, asmName>;
917 multiclass VOP1_Real_FULL_with_name_gfx11_gfx12<bits<9> op, string opName,
919 VOP1_Real_FULL_with_name<GFX11Gen, op, opName, asmName>,
920 VOP1_Real_FULL_with_name<GFX12Gen, op, opName, asmName>;
929 string opName, string asmName> :
930 VOP1_Real_e32_with_name<Gen, op, opName, asmName>,
931 VOP3_Real_with_name<Gen, {0, 1, 1, op{6-0}}, opName, asmName>;