Lines Matching full:stm
159 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in emitFunctionBodyStart() local
163 if (STM.requiresCodeObjectV6() && CodeObjectVersion < AMDGPU::AMDHSA_COV6) { in emitFunctionBodyStart()
165 STM.getCPU() + " is only available on code object version 6 or better", in emitFunctionBodyStart()
174 const auto &FunctionTargetID = STM.getTargetID(); in emitFunctionBodyStart()
197 if (STM.isMesaKernel(F) && in emitFunctionBodyStart()
202 KernelCode.validate(&STM, MF->getContext()); in emitFunctionBodyStart()
206 if (STM.isAmdHsaOS()) in emitFunctionBodyStart()
210 assert(AMDGPU::hasKernargPreload(STM)); in emitFunctionBodyStart()
212 STM.isAmdHsaOS()); in emitFunctionBodyStart()
237 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in emitFunctionBodyEnd() local
242 STM, KernelName, getAmdhsaKernelDescriptor(*MF, CurrentProgramInfo), in emitFunctionBodyEnd()
277 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>(); in emitFunctionEntryLabel() local
278 if (MFI->isEntryFunction() && STM.isAmdHsaOrMesa(MF->getFunction())) { in emitFunctionEntryLabel()
483 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getAmdhsaKernelDescriptor() local
496 STM.getKernArgSegmentSize(F, MaxKernArgAlign), Ctx); in getAmdhsaKernelDescriptor()
498 KernelDescriptor.compute_pgm_rsrc1 = PI.getComputePGMRSrc1(STM, Ctx); in getAmdhsaKernelDescriptor()
507 assert(STM.hasGFX90AInsts() || !EvaluatableRsrc3 || in getAmdhsaKernelDescriptor()
512 AMDGPU::hasKernargPreload(STM) ? Info->getNumKernargPreloadedSGPRs() : 0, in getAmdhsaKernelDescriptor()
536 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
539 if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) { in runOnMachineFunction()
549 if (STM.isAmdPalOS()) { in runOnMachineFunction()
554 } else if (!STM.isAmdHsaOS()) { in runOnMachineFunction()
559 if (STM.dumpCode()) { in runOnMachineFunction()
574 STM.hasMAIInsts()); in runOnMachineFunction()
587 STM.hasMAIInsts() ? Info.NumAGPR : std::optional<uint32_t>(), in runOnMachineFunction()
588 Info.getTotalNumVGPRs(STM), in runOnMachineFunction()
597 STM.hasMAIInsts() ? CurrentProgramInfo.NumAccVGPR : nullptr, in runOnMachineFunction()
624 if (STM.hasGFX90AInsts()) { in runOnMachineFunction()
663 assert(STM.hasGFX90AInsts() || in runOnMachineFunction()
667 if (STM.hasGFX90AInsts()) { in runOnMachineFunction()
724 const GCNSubtarget &STM = TM.getSubtarget<GCNSubtarget>(F); in initializeTargetID() local
725 const IsaInfo::AMDGPUTargetID &STMTargetID = STM.getTargetID(); in initializeTargetID()
736 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getFunctionCodeSize() local
737 const SIInstrInfo *TII = STM.getInstrInfo(); in getFunctionCodeSize()
760 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getSIProgramInfo() local
778 ProgInfo.NumVGPR = CreateExpr(Info.getTotalNumVGPRs(STM)); in getSIProgramInfo()
781 ProgInfo.TgSplit = STM.isTgSplitEnabled(); in getSIProgramInfo()
790 STM.getMaxWaveScratchSize() / STM.getWavefrontSize(); in getSIProgramInfo()
809 if (STM.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS && in getSIProgramInfo()
810 !STM.hasSGPRInitBug()) { in getSIProgramInfo()
811 unsigned MaxAddressableNumSGPRs = STM.getAddressableNumSGPRs(); in getSIProgramInfo()
836 F.getCallingConv() == CallingConv::AMDGPU_PS && !STM.isAmdHsaOS(); in getSIProgramInfo()
912 CreateExpr(STM.getMinNumSGPRs(MaxWaves))}, in getSIProgramInfo()
916 CreateExpr(STM.getMinNumVGPRs(MaxWaves))}, in getSIProgramInfo()
919 if (STM.getGeneration() <= AMDGPUSubtarget::SEA_ISLANDS || in getSIProgramInfo()
920 STM.hasSGPRInitBug()) { in getSIProgramInfo()
921 unsigned MaxAddressableNumSGPRs = STM.getAddressableNumSGPRs(); in getSIProgramInfo()
937 if (STM.hasSGPRInitBug()) { in getSIProgramInfo()
944 if (MFI->getNumUserSGPRs() > STM.getMaxNumUserSGPRs()) { in getSIProgramInfo()
948 STM.getMaxNumUserSGPRs(), DS_Error); in getSIProgramInfo()
953 static_cast<unsigned>(STM.getAddressableLocalMemorySize())) { in getSIProgramInfo()
957 STM.getAddressableLocalMemorySize(), DS_Error); in getSIProgramInfo()
976 IsaInfo::getSGPREncodingGranule(&STM)); in getSIProgramInfo()
978 IsaInfo::getVGPREncodingGranule(&STM)); in getSIProgramInfo()
992 if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) { in getSIProgramInfo()
1016 STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 8 : 10; in getSIProgramInfo()
1022 CreateExpr(STM.getWavefrontSize()), Ctx), in getSIProgramInfo()
1026 ProgInfo.WgpMode = STM.isCuModeEnabled() ? 0 : 1; in getSIProgramInfo()
1050 STM.isAmdHsaOS() ? 0 : STM.isTrapHandlerEnabled(); in getSIProgramInfo()
1058 ProgInfo.LdsSize = STM.isAmdHsaOS() ? 0 : ProgInfo.LDSBlocks; in getSIProgramInfo()
1061 if (STM.hasGFX90AInsts()) { in getSIProgramInfo()
1084 STM.computeOccupancy(F, ProgInfo.LDSSize), ProgInfo.NumSGPRsForWavesPerEU, in getSIProgramInfo()
1085 ProgInfo.NumVGPRsForWavesPerEU, STM, Ctx); in getSIProgramInfo()
1117 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in EmitProgramInfoSI() local
1140 EmitResolvedOrExpr(CurrentProgramInfo.getComputePGMRSrc1(STM, Ctx), in EmitProgramInfoSI()
1150 if (STM.getGeneration() >= AMDGPUSubtarget::GFX12) { in EmitProgramInfoSI()
1154 } else if (STM.getGeneration() == AMDGPUSubtarget::GFX11) { in EmitProgramInfoSI()
1178 if (STM.getGeneration() >= AMDGPUSubtarget::GFX12) { in EmitProgramInfoSI()
1182 } else if (STM.getGeneration() == AMDGPUSubtarget::GFX11) { in EmitProgramInfoSI()
1195 unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11 in EmitProgramInfoSI()
1248 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in EmitPALMetadata() local
1249 if (STM.hasMAIInsts()) { in EmitPALMetadata()
1255 MD->setRsrc1(CC, CurrentProgramInfo.getPGMRSrc1(CC, STM, Ctx), Ctx); in EmitPALMetadata()
1269 EmitPALMetadataCommon(MD, CurrentProgramInfo, CC, STM); in EmitPALMetadata()
1280 unsigned ExtraLDSSize = STM.getGeneration() >= AMDGPUSubtarget::GFX11 in EmitPALMetadata()
1293 STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 256 : 128; in EmitPALMetadata()
1320 if (MD->getPALMajorVersion() < 3 && STM.isWave32()) in EmitPALMetadata()
1371 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getAmdKernelCode() local
1374 Out.initDefault(&STM, Ctx, /*InitMCExpr=*/false); in getAmdKernelCode()
1377 CurrentProgramInfo.getComputePGMRSrc1(STM, Ctx); in getAmdKernelCode()
1385 getElementByteSizeValue(STM.getMaxPrivateElementSize(true))); in getAmdKernelCode()
1413 if (STM.isXNACKEnabled()) in getAmdKernelCode()
1417 Out.kernarg_segment_byte_size = STM.getKernArgSegmentSize(F, MaxKernArgAlign); in getAmdKernelCode()