Merge branch 'linus' into smp/core

Pull in upstream to get the fixes so depending changes can be applied.

Merge drm/drm-next into drm-misc-next

Updating drm-misc-next to the state of Linux v6.6-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'v6.6-rc4' into perf/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge tag 'v6.6-rc2' into locking/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge drm/drm-next into drm-intel-next

Sync to v6.6-rc1.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-fixes into drm-misc-fixes

Forwarding to v6.6-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'v6.5' into next

Sync up with mainline to bring in updates to the shared infrastructure.

Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"These are the devicetree updates for Arm and RISC-V based SoCs, main

Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
"These are the devicetree updates for Arm and RISC-V based SoCs, mainly
from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and
Starfive.

Only a few new SoC got added:

- TI AM62P5, a variant of the existing Sitara AM62x family

- Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55
SoC.

- Qualcomm ipq5018 is used in wireless access points

- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone
platform.

In total, 29 machines get added, which is low because of the summer
break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
these are development and reference boards.

Despite not adding a lot of new machines, there are over 700 patches
in total, most of which are cleanups and minor fixes"

* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits)
arm64: dts: use capital "OR" for multiple licenses in SPDX
ARM: dts: use capital "OR" for multiple licenses in SPDX
arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
ARM: dts: qcom: apq8064: add support to gsbi4 uart
riscv: dts: change TH1520 files to dual license
riscv: dts: thead: add BeagleV Ahead board device tree
dt-bindings: riscv: Add BeagleV Ahead board compatibles
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Add PDC
riscv: dts: starfive: fix jh7110 qspi sort order
...

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Merge tag 'zynqmp-dt-for-6.6' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for v6.6

- Describe caches
- Fix i2c gpio recovery description
- Setting up default i2c fr

Merge tag 'zynqmp-dt-for-6.6' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for v6.6

- Describe caches
- Fix i2c gpio recovery description
- Setting up default i2c frequency
- Describe GEM TSU clock and assigned rates for SOMs
- Reserved 1MB for internal firmware usage
- Fix dwc3 IRQ description
- Describe interrupts by using macros

* tag 'zynqmp-dt-for-6.6' of https://github.com/Xilinx/linux-xlnx:
arm64: zynqmp: Describe interrupts by using macros
arm64: zynqmp: Fix dwc3 usb interrupt description
arm64: zynqmp: Add memory reserved node for k26 Kria SOM board
arm64: zynqmp: Assign TSU clock frequency for GEMs
arm64: zynqmp: Setting default i2c clock frequency to 400kHz
arm64: zynqmp: Fix open drain warning on ZynqMP
arm64: zynqmp: Add L2 cache nodes

Link: https://lore.kernel.org/r/fde6d7b4-c751-219d-3ec5-04e5bad2aa17@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Merge drm/drm-next into drm-intel-next

Catching-up with drm-next and drm-intel-gt-next.
It will unblock a code refactor around the platform
definitions (names vs acronyms).

Signed-off-by: Rodrigo V

Merge drm/drm-next into drm-intel-next

Catching-up with drm-next and drm-intel-gt-next.
It will unblock a code refactor around the platform
definitions (names vs acronyms).

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Merge drm/drm-next into drm-intel-gt-next

Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as
a dependency for https://patchwork.freedesktop.org/series/1

Merge drm/drm-next into drm-intel-gt-next

Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as
a dependency for https://patchwork.freedesktop.org/series/121735/

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

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Merge drm/drm-next into drm-misc-next

Backmerging to get v6.5-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

ASoC: Merge v6.5-rc2

Get a similar baseline to my other branches, and fixes for people using
the branch.

Merge v6.5-rc1 into drm-misc-fixes

Boris needs 6.5-rc1 in drm-misc-fixes to prevent a conflict.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

arm64: zynqmp: Assign TSU clock frequency for GEMs

Allow changing TSU clock for all GEMs. Kria SOM is using this
functionality that's why set TSU clock frequency as 250MHz (minimum when
running at 1

arm64: zynqmp: Assign TSU clock frequency for GEMs

Allow changing TSU clock for all GEMs. Kria SOM is using this
functionality that's why set TSU clock frequency as 250MHz (minimum when
running at 1G) to allow PTP functionality.

Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3b9285b50a2a4abb136ecb0873343a4e84626581.1686228675.git.michal.simek@amd.com

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arm64: zynqmp: Fix open drain warning on ZynqMP

Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT
binding. Similar change was done by commit 8df80c1801c9 ("ARM: dts: exynos:
C

arm64: zynqmp: Fix open drain warning on ZynqMP

Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT
binding. Similar change was done by commit 8df80c1801c9 ("ARM: dts: exynos:
Convert to new i2c-gpio bindings").

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com

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Merge branch 'master' into mm-hotfixes-stable

Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files,

Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for
each SoC vendor, following the same scheme that is used on arm64, mips
and riscv. This has been discussed for many years, but so far we never
did this as there was a plan to move the files out of the kernel
entirely, which has never happened.

The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.

There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along with
their device drivers.

- The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the
time.

- Amlogic C3 is a Cortex-A35 based smart IP camera chip

- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.

- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.

- Qualcomm SDX75 is the latest generation modem chip that is used as
a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.

- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
Xuantie C910 core, a step up from all previously added rv64 chips.

All of the above come with reference board implementations, those
included there are 39 new board files, but only five more 32-bit this
time, probably a new low:

- Marantec Maveo board based on dhcor imx6ull module

- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip

- Epson Moverio BT-200 AR glasses based on TI OMAP4

- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM

- ICnova ADB4006 board based on Allwinner A20

On the 64-bit side, there are also fewer addded machines than we had
in the recent releases:

- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.

- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234

- Qualcomm gains support for 6 reference boards on various members of
their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
of the various reference platforms for their new chips.

- Rockchips support for several newer boards: Indiedroid Nova
(rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
Fastrhino R66S/R68S (rk3568)

- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
Verdin family with AM62 COM, carrier and dev boards

Other changes to existing boards contain the usual minor improvements
along with

- continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names

- support for devicetree overlays on at91, bcm283x

- significant additions to existing SoC support on mediatek,
qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
STM32MP1

As usual, a lot more detail is available in the individual merge
commits"

* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
ARM: mvebu: fix unit address on armada-390-db flash
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
arm: dts: Enable device-tree overlay support for AT91 boards
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
ARM: dts: at91: use generic name for shutdown controller
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
...

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Merge tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for v6.5

Various small fixes and cleanups to be aligned with the latest dt-schema.

Other

Merge tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for v6.5

Various small fixes and cleanups to be aligned with the latest dt-schema.

Other major changes are:
- Wire mali-400 gpu
- Change board name for zcu1275
- Use ethernet-phy-id to handle ETH phy reset properly
- Switch to amd.com emails
- Update people in DT bindings

* tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx: (33 commits)
dt-bindings: usb: xilinx: Replace Manish by Piyush
dt-bindings: xilinx: Remove Rajan, Jolly and Manish
arm64: zynqmp: Used fixed-partitions for QSPI in k26
arm64: zynqmp: Add pmu interrupt-affinity
arm64: zynqmp: Set qspi tx-buswidth to 4
arm64: zynqmp: Fix usb node drive strength and slew rate
arm64: zynqmp: Describe TI phy as ethernet-phy-id
arm64: zynqmp: Switch to amd.com emails
arm64: zynqmp: Convert kv260-revA overlay to ASCII text
dt-bindings: xilinx: Switch xilinx.com emails to amd.com
arm64: xilinx: Use zynqmp prefix for SOM dt overlays
arm64: zynqmp: Add phase tags marking
arm64: zynqmp: Describe bus-width for SD card on KV260
arm64: zynqmp: Enable AMS on SOM and other zcu10x boards
arm64: zynqmp: Enable DP driver for SOMs
arm64: zynqmp: Setup clock for DP and DPDMA
arm64: zynqmp: Switch to ethernet-phy-id in kv260
arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2
arm64: zynqmp: Add pinctrl emmc description to SM-K26
arm64: zynqmp: Add gpio labels for modepin gpio
...

Link: https://lore.kernel.org/r/CAHTX3d+2s_KmCnd=x5hydGb+LYoznAzYGTizvqqN2NFmrBurfw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: zynqmp: Fix usb node drive strength and slew rate

As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
str

arm64: zynqmp: Fix usb node drive strength and slew rate

As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb group pins.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com

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arm64: zynqmp: Switch to amd.com emails

Update my and DPs email address to match current setup.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Krzysztof Kozlowski <krzy

arm64: zynqmp: Switch to amd.com emails

Update my and DPs email address to match current setup.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com

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arm64: zynqmp: Describe bus-width for SD card on KV260

SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lo

arm64: zynqmp: Describe bus-width for SD card on KV260

SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b4046d2f593047400c190e438fd9d05128c293d9.1683034376.git.michal.simek@amd.com

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arm64: zynqmp: Enable DP driver for SOMs

DP DMA is already enabled that's why there is no reason to keep DP
disabled.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.or

arm64: zynqmp: Enable DP driver for SOMs

DP DMA is already enabled that's why there is no reason to keep DP
disabled.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15d16b4de933bfae108df6ca368eb2cdf916aa02.1683034376.git.michal.simek@amd.com

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arm64: zynqmp: Setup clock for DP and DPDMA

Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link

arm64: zynqmp: Setup clock for DP and DPDMA

Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/807e22371394222f728ff7d6b190a96a12145439.1683034376.git.michal.simek@amd.com

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arm64: zynqmp: Switch to ethernet-phy-id in kv260

Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for

arm64: zynqmp: Switch to ethernet-phy-id in kv260

Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4b139e942c2a808eecbb30226b6ea5303348390a.1683034376.git.michal.simek@amd.com

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