amdgpu.h (9f31a0b0328cb70b9ea1058579710fb1439ee332) amdgpu.h (4e99a44e37bfed8c4f25c94687e8e4ac4ae65086)
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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1822
1823/*
1824 * ASIC specific functions.
1825 */
1826struct amdgpu_asic_funcs {
1827 bool (*read_disabled_bios)(struct amdgpu_device *adev);
1828 bool (*read_bios_from_rom)(struct amdgpu_device *adev,
1829 u8 *bios, u32 length_bytes);
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation

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1822
1823/*
1824 * ASIC specific functions.
1825 */
1826struct amdgpu_asic_funcs {
1827 bool (*read_disabled_bios)(struct amdgpu_device *adev);
1828 bool (*read_bios_from_rom)(struct amdgpu_device *adev,
1829 u8 *bios, u32 length_bytes);
1830 void (*detect_hw_virtualization) (struct amdgpu_device *adev);
1830 int (*read_register)(struct amdgpu_device *adev, u32 se_num,
1831 u32 sh_num, u32 reg_offset, u32 *value);
1832 void (*set_vga_state)(struct amdgpu_device *adev, bool state);
1833 int (*reset)(struct amdgpu_device *adev);
1834 /* get the reference clock */
1835 u32 (*get_xclk)(struct amdgpu_device *adev);
1836 /* MM block clocks */
1837 int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
1838 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
1831 int (*read_register)(struct amdgpu_device *adev, u32 se_num,
1832 u32 sh_num, u32 reg_offset, u32 *value);
1833 void (*set_vga_state)(struct amdgpu_device *adev, bool state);
1834 int (*reset)(struct amdgpu_device *adev);
1835 /* get the reference clock */
1836 u32 (*get_xclk)(struct amdgpu_device *adev);
1837 /* MM block clocks */
1838 int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
1839 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
1839 /* query virtual capabilities */
1840 u32 (*get_virtual_caps)(struct amdgpu_device *adev);
1841 /* static power management */
1842 int (*get_pcie_lanes)(struct amdgpu_device *adev);
1843 void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
1844};
1845
1846/*
1847 * IOCTL.
1848 */

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1929
1930/*
1931 * CGS
1932 */
1933struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
1934void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
1935
1936
1840 /* static power management */
1841 int (*get_pcie_lanes)(struct amdgpu_device *adev);
1842 void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
1843};
1844
1845/*
1846 * IOCTL.
1847 */

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1928
1929/*
1930 * CGS
1931 */
1932struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
1933void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
1934
1935
1936#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS (1 << 0) /* vBIOS is sr-iov ready */
1937#define AMDGPU_SRIOV_CAPS_ENABLE_IOV (1 << 1) /* sr-iov is enabled on this GPU */
1938#define AMDGPU_SRIOV_CAPS_IS_VF (1 << 2) /* this GPU is a virtual function */
1939#define AMDGPU_PASSTHROUGH_MODE (1 << 3) /* thw whole GPU is pass through for VM */
1937/* GPU virtualization */
1940/* GPU virtualization */
1938#define AMDGPU_VIRT_CAPS_SRIOV_EN (1 << 0)
1939#define AMDGPU_VIRT_CAPS_IS_VF (1 << 1)
1940struct amdgpu_virtualization {
1941struct amdgpu_virtualization {
1941 bool supports_sr_iov;
1942 bool is_virtual;
1943 u32 caps;
1942 uint32_t virtual_caps;
1944};
1945
1943};
1944
1945#define amdgpu_sriov_enabled(adev) \
1946((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
1947
1948#define amdgpu_sriov_vf(adev) \
1949((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
1950
1951#define amdgpu_sriov_bios(adev) \
1952((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
1953
1954#define amdgpu_passthrough(adev) \
1955((adev)->virtualization.virtual_caps & AMDGPU_PASSTHROUGH_MODE)
1956
1957static inline bool is_virtual_machine(void)
1958{
1959#ifdef CONFIG_X86
1960 return boot_cpu_has(X86_FEATURE_HYPERVISOR);
1961#else
1962 return false;
1963#endif
1964}
1965
1946/*
1947 * Core structure, functions and helpers.
1948 */
1949typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
1950typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
1951
1952typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
1953typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);

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2255/*
2256 * ASICs macro.
2257 */
2258#define amdgpu_asic_set_vga_state(adev, state) (adev)->asic_funcs->set_vga_state((adev), (state))
2259#define amdgpu_asic_reset(adev) (adev)->asic_funcs->reset((adev))
2260#define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))
2261#define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))
2262#define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))
1966/*
1967 * Core structure, functions and helpers.
1968 */
1969typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
1970typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
1971
1972typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
1973typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);

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2275/*
2276 * ASICs macro.
2277 */
2278#define amdgpu_asic_set_vga_state(adev, state) (adev)->asic_funcs->set_vga_state((adev), (state))
2279#define amdgpu_asic_reset(adev) (adev)->asic_funcs->reset((adev))
2280#define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))
2281#define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))
2282#define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))
2263#define amdgpu_asic_get_virtual_caps(adev) ((adev)->asic_funcs->get_virtual_caps((adev)))
2264#define amdgpu_get_pcie_lanes(adev) (adev)->asic_funcs->get_pcie_lanes((adev))
2265#define amdgpu_set_pcie_lanes(adev, l) (adev)->asic_funcs->set_pcie_lanes((adev), (l))
2266#define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))
2267#define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))
2268#define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
2283#define amdgpu_get_pcie_lanes(adev) (adev)->asic_funcs->get_pcie_lanes((adev))
2284#define amdgpu_set_pcie_lanes(adev, l) (adev)->asic_funcs->set_pcie_lanes((adev), (l))
2285#define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))
2286#define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))
2287#define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
2288#define amdgpu_asic_detect_hw_virtualization(adev) (adev)->asic_funcs->detect_hw_virtualization((adev))
2269#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
2270#define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
2271#define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
2272#define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib), (pe), (src), (count)))
2273#define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr)))
2274#define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags)))
2275#define amdgpu_ring_parse_cs(r, p, ib) ((r)->funcs->parse_cs((p), (ib)))
2276#define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r))

--- 258 unchanged lines hidden --- 		2289#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
2290#define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
2291#define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
2292#define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib), (pe), (src), (count)))
2293#define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr)))
2294#define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags)))
2295#define amdgpu_ring_parse_cs(r, p, ib) ((r)->funcs->parse_cs((p), (ib)))
2296#define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r))

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