arc_timer.c (eadcbfa58ae8693f0d6a0f591d8f51d55cf068e1) arc_timer.c (1727339590fdb5a1ded881b540cd32121278d414)
1/*
2 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */

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94 }
95
96 ret = arc_get_timer_clk(node);
97 if (ret)
98 return ret;
99
100 return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
101}
1/*
2 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */

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94 }
95
96 ret = arc_get_timer_clk(node);
97 if (ret)
98 return ret;
99
100 return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
101}
102CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
102TIMER_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
103
104#define AUX_RTC_CTRL 0x103
105#define AUX_RTC_LOW 0x104
106#define AUX_RTC_HIGH 0x105
107
108static u64 arc_read_rtc(struct clocksource *cs)
109{
110 unsigned long status;

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153 ret = arc_get_timer_clk(node);
154 if (ret)
155 return ret;
156
157 write_aux_reg(AUX_RTC_CTRL, 1);
158
159 return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
160}
103
104#define AUX_RTC_CTRL 0x103
105#define AUX_RTC_LOW 0x104
106#define AUX_RTC_HIGH 0x105
107
108static u64 arc_read_rtc(struct clocksource *cs)
109{
110 unsigned long status;

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153 ret = arc_get_timer_clk(node);
154 if (ret)
155 return ret;
156
157 write_aux_reg(AUX_RTC_CTRL, 1);
158
159 return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
160}
161CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
161TIMER_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
162
163#endif
164
165/*
166 * 32bit TIMER1 to keep counting monotonically and wraparound
167 */
168
169static u64 arc_read_timer1(struct clocksource *cs)

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328 init_count = 1;
329 ret = arc_clockevent_setup(np);
330 } else {
331 ret = arc_cs_setup_timer1(np);
332 }
333
334 return ret;
335}
162
163#endif
164
165/*
166 * 32bit TIMER1 to keep counting monotonically and wraparound
167 */
168
169static u64 arc_read_timer1(struct clocksource *cs)

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328 init_count = 1;
329 ret = arc_clockevent_setup(np);
330 } else {
331 ret = arc_cs_setup_timer1(np);
332 }
333
334 return ret;
335}
336CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
336TIMER_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);