tqm8541.dts (28eac2b74cc7136dee3f2615167811d24d25bc97) tqm8541.dts (e1a228973646bfa09575423cf5c40b3d0f40d670)
1/*
2 * TQM 8541 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your

--- 43 unchanged lines hidden (view full) ---

52 #address-cells = <1>;
53 #size-cells = <1>;
54 device_type = "soc";
55 ranges = <0x0 0xe0000000 0x100000>;
56 reg = <0xe0000000 0x200>;
57 bus-frequency = <0>;
58 compatible = "fsl,mpc8541-immr", "simple-bus";
59
1/*
2 * TQM 8541 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your

--- 43 unchanged lines hidden (view full) ---

52 #address-cells = <1>;
53 #size-cells = <1>;
54 device_type = "soc";
55 ranges = <0x0 0xe0000000 0x100000>;
56 reg = <0xe0000000 0x200>;
57 bus-frequency = <0>;
58 compatible = "fsl,mpc8541-immr", "simple-bus";
59
60 ecm-law@0 {
61 compatible = "fsl,ecm-law";
62 reg = <0x0 0x1000>;
63 fsl,num-laws = <8>;
64 };
65
66 ecm@1000 {
67 compatible = "fsl,mpc8541-ecm", "fsl,ecm";
68 reg = <0x1000 0x1000>;
69 interrupts = <17 2>;
70 interrupt-parent = <&mpic>;
71 };
72
60 memory-controller@2000 {
61 compatible = "fsl,mpc8540-memory-controller";
62 reg = <0x2000 0x1000>;
63 interrupt-parent = <&mpic>;
64 interrupts = <18 2>;
65 };
66
67 L2: l2-cache-controller@20000 {

--- 243 unchanged lines hidden --- 		73 memory-controller@2000 {
74 compatible = "fsl,mpc8540-memory-controller";
75 reg = <0x2000 0x1000>;
76 interrupt-parent = <&mpic>;
77 interrupts = <18 2>;
78 };
79
80 L2: l2-cache-controller@20000 {

--- 243 unchanged lines hidden ---