time.c (a8c4c20dfa8b28a3c99e33c639d9c2ea5657741e) time.c (52e405eaa9806968e88b35d65e57acad954a5ab5)
1/*
2 * linux/arch/arm/mach-omap1/time.c
3 *
4 * OMAP Timers
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 * Partial timer rewrite and additional dynamic tick timer support by
8 * Tony Lindgen <tony@atomide.com> and

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172 timer_tick(regs);
173 write_sequnlock(&xtime_lock);
174
175 return IRQ_HANDLED;
176}
177
178static struct irqaction omap_mpu_timer_irq = {
179 .name = "mpu timer",
1/*
2 * linux/arch/arm/mach-omap1/time.c
3 *
4 * OMAP Timers
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 * Partial timer rewrite and additional dynamic tick timer support by
8 * Tony Lindgen <tony@atomide.com> and

--- 163 unchanged lines hidden (view full) ---

172 timer_tick(regs);
173 write_sequnlock(&xtime_lock);
174
175 return IRQ_HANDLED;
176}
177
178static struct irqaction omap_mpu_timer_irq = {
179 .name = "mpu timer",
180 .flags = SA_INTERRUPT | SA_TIMER,
180 .flags = IRQF_DISABLED | IRQF_TIMER,
181 .handler = omap_mpu_timer_interrupt,
182};
183
184static unsigned long omap_mpu_timer1_overflows;
185static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id,
186 struct pt_regs *regs)
187{
188 omap_mpu_timer1_overflows++;
189 return IRQ_HANDLED;
190}
191
192static struct irqaction omap_mpu_timer1_irq = {
193 .name = "mpu timer1 overflow",
181 .handler = omap_mpu_timer_interrupt,
182};
183
184static unsigned long omap_mpu_timer1_overflows;
185static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id,
186 struct pt_regs *regs)
187{
188 omap_mpu_timer1_overflows++;
189 return IRQ_HANDLED;
190}
191
192static struct irqaction omap_mpu_timer1_irq = {
193 .name = "mpu timer1 overflow",
194 .flags = SA_INTERRUPT,
194 .flags = IRQF_DISABLED,
195 .handler = omap_mpu_timer1_interrupt,
196};
197
198static __init void omap_init_mpu_timer(void)
199{
200 set_cyc2ns_scale(MPU_TICKS_PER_SEC / 1000);
201 omap_timer.offset = omap_mpu_timer_gettimeoffset;
202 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);

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195 .handler = omap_mpu_timer1_interrupt,
196};
197
198static __init void omap_init_mpu_timer(void)
199{
200 set_cyc2ns_scale(MPU_TICKS_PER_SEC / 1000);
201 omap_timer.offset = omap_mpu_timer_gettimeoffset;
202 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);

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