i2c.8 (0269ae4c19ad779b43b0d6e2416ac7386945d692) i2c.8 (6d6d6c360322227ba838c53ed72d31937a425800)
1.\"
2.\" Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright

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50.Nm
51.Cm -r
52.Op Fl f Ar device
53.Op Fl v
54.Sh DESCRIPTION
55The
56.Nm
57utility can be used to perform raw data transfers (read or write) with devices
1.\"
2.\" Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright

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50.Nm
51.Cm -r
52.Op Fl f Ar device
53.Op Fl v
54.Sh DESCRIPTION
55The
56.Nm
57utility can be used to perform raw data transfers (read or write) with devices
58on the I2C bus. It can also scan the bus for available devices and reset the
59I2C controller.
58on the I2C bus.
59It can also scan the bus for available devices and reset the I2C controller.
60.Pp
61The options are as follows:
62.Bl -tag -width ".Fl d Ar direction"
63.It Fl a Ar address
647-bit address on the I2C device to operate on (hex).
65.It Fl b
66binary mode - when performing a read operation, the data read from the device
67is output in binary format on stdout; when doing a write, the binary data to

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119specified with
120.Fl o
121to the slave.
122Zero means that the offset is ignored and not passed to the slave at all.
123.El
124.Sh WARNINGS
125Great care must be taken when manipulating slave I2C devices with the
126.Nm
60.Pp
61The options are as follows:
62.Bl -tag -width ".Fl d Ar direction"
63.It Fl a Ar address
647-bit address on the I2C device to operate on (hex).
65.It Fl b
66binary mode - when performing a read operation, the data read from the device
67is output in binary format on stdout; when doing a write, the binary data to

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119specified with
120.Fl o
121to the slave.
122Zero means that the offset is ignored and not passed to the slave at all.
123.El
124.Sh WARNINGS
125Great care must be taken when manipulating slave I2C devices with the
126.Nm
127utility. Often times important configuration data for the system is kept in
128non-volatile but write enabled memories located on the I2C bus, for example
129Ethernet hardware addresses, RAM module parameters (SPD), processor reset
130configuration word etc.
127utility.
128Often times important configuration data for the system is kept in non-volatile
129but write enabled memories located on the I2C bus, for example Ethernet hardware
130addresses, RAM module parameters (SPD), processor reset configuration word etc.
131.Pp
132It is very easy to render the whole system unusable when such configuration
133data is deleted or altered, so use the
134.Dq -d w
135(write) command only if you know exactly what you are doing.
136.Pp
137Also avoid ungraceful interrupting of an ongoing transaction on the I2C bus,
131.Pp
132It is very easy to render the whole system unusable when such configuration
133data is deleted or altered, so use the
134.Dq -d w
135(write) command only if you know exactly what you are doing.
136.Pp
137Also avoid ungraceful interrupting of an ongoing transaction on the I2C bus,
138as it can lead to potentially dangerous effects. Consider the following
139scenario: when the host CPU is reset (for whatever reason) in the middle of a
140started I2C transaction, the I2C slave device could be left in write mode
141waiting for data or offset to arrive. When the CPU reinitializes itself and
142talks to this I2C slave device again, the commands and other control info it
143sends are treated by the slave device as data or offset it was waiting for,
144and there's great potential for corruption if such a write is performed.
138as it can lead to potentially dangerous effects.
139Consider the following scenario: when the host CPU is reset (for whatever reason)
140in the middle of a started I2C transaction, the I2C slave device could be left
141in write mode waiting for data or offset to arrive.
142When the CPU reinitializes itself and talks to this I2C slave device again,
143the commands and other control info it sends are treated by the slave device
144as data or offset it was waiting for, and there's great potential for
145corruption if such a write is performed.
145.Sh EXAMPLES
146.Bl -bullet
147.It
148Scan the default bus (/dev/iic0) for devices:
149.Pp
150i2c -s
151.It
152Scan the default bus (/dev/iic0) for devices and skip addresses 0x56 and

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146.Sh EXAMPLES
147.Bl -bullet
148.It
149Scan the default bus (/dev/iic0) for devices:
150.Pp
151i2c -s
152.It
153Scan the default bus (/dev/iic0) for devices and skip addresses 0x56 and

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