| rtsxreg.h (577130e56e524eb185ff4d32644dae26be4d28d4) | rtsxreg.h (8290c144201804d3f01ae16eebe1b9a6b221af54) |
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| 1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * Copyright (c) 2012 Stefan Sperling <stsp@openbsd.org> 6 * Copyright (c) 2020 Henri Hennebert <hlh@restart.be> 7 * All rights reserved. 8 * --- 711 unchanged lines hidden (view full) --- 720 721#define RTSX_L1SUB_CONFIG2 0xFE8E 722#define RTSX_L1SUB_AUTO_CFG 0x02 723 724#define RTSX_L1SUB_CONFIG3 0xFE8F 725 726#define RTSX_DUMMY_REG 0xFE90 727 | 1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * Copyright (c) 2012 Stefan Sperling <stsp@openbsd.org> 6 * Copyright (c) 2020 Henri Hennebert <hlh@restart.be> 7 * All rights reserved. 8 * --- 711 unchanged lines hidden (view full) --- 720 721#define RTSX_L1SUB_CONFIG2 0xFE8E 722#define RTSX_L1SUB_AUTO_CFG 0x02 723 724#define RTSX_L1SUB_CONFIG3 0xFE8F 725 726#define RTSX_DUMMY_REG 0xFE90 727 |
| 728#define RTSX_REG_VREF 0xFE97 729#define RTSX_PWD_SUSPND_EN 0x10 730 |
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| 728#define RTSX_RTS5260_DMA_RST_CTL_0 0xFEBF 729#define RTSX_RTS5260_DMA_RST 0x80 730#define RTSX_RTS5260_ADMA3_RST 0x40 731 732#define RTSX_PETXCFG 0xFF03 /* was 0xFE49 in OpenBSD */ | 731#define RTSX_RTS5260_DMA_RST_CTL_0 0xFEBF 732#define RTSX_RTS5260_DMA_RST 0x80 733#define RTSX_RTS5260_ADMA3_RST 0x40 734 735#define RTSX_PETXCFG 0xFF03 /* was 0xFE49 in OpenBSD */ |
| 733#define RTSX_PETXCFG_CLKREQ_PIN 0x08 | 736#define RTSX_FORCE_CLKREQ_DELINK_MASK 0x80 737#define RTSX_FORCE_CLKREQ_LOW 0x80 |
| 734 735#define RTSX_RREF_CFG 0xFF6C 736#define RTSX_RREF_VBGSEL_MASK 0x38 737#define RTSX_RREF_VBGSEL_1V25 0x28 738 739#define RTSX_PM_CTRL3 0xFF46 740#define RTSX_RTS522A_PM_CTRL3 0xFF7E 741#define RTSX_D3_DELINK_MODE_EN 0x10 --- 28 unchanged lines hidden (view full) --- 770#define RTSX_LDO_VCC_1V8 0x04 771#define RTSX_LDO_VCC_3V3 0x07 772#define RTSX_LDO_VCC_LMT_EN 0x08 773/*RTS5260*/ 774#define RTSX_LDO_POW_SDVDD1_MASK 0x08 775#define RTSX_LDO_POW_SDVDD1_ON 0x08 776#define RTSX_LDO_POW_SDVDD1_OFF 0x00 777 | 738 739#define RTSX_RREF_CFG 0xFF6C 740#define RTSX_RREF_VBGSEL_MASK 0x38 741#define RTSX_RREF_VBGSEL_1V25 0x28 742 743#define RTSX_PM_CTRL3 0xFF46 744#define RTSX_RTS522A_PM_CTRL3 0xFF7E 745#define RTSX_D3_DELINK_MODE_EN 0x10 --- 28 unchanged lines hidden (view full) --- 774#define RTSX_LDO_VCC_1V8 0x04 775#define RTSX_LDO_VCC_3V3 0x07 776#define RTSX_LDO_VCC_LMT_EN 0x08 777/*RTS5260*/ 778#define RTSX_LDO_POW_SDVDD1_MASK 0x08 779#define RTSX_LDO_POW_SDVDD1_ON 0x08 780#define RTSX_LDO_POW_SDVDD1_OFF 0x00 781 |
| 782#define RTSX_RTS5260_DVCC_CTRL 0xFF73 783#define RTSX_RTS5260_DVCC_OCP_EN (0x01 << 7) 784#define RTSX_RTS5260_DVCC_OCP_THD_MASK (0x07 << 4) 785#define RTSX_RTS5260_DVCC_POWERON (0x01 << 3) 786#define RTSX_RTS5260_DVCC_OCP_CL_EN (0x01 << 2) |
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| 778 779#define RTSX_LDO_VIO_CFG 0xFF75 780#define RTSX_LDO_VIO_TUNE_MASK 0x07 781#define RTSX_LDO_VIO_1V7 0x03 782 783#define RTSX_LDO_DV12S_CFG 0xFF76 784#define RTSX_LDO_D12_TUNE_MASK 0x07 785#define RTSX_LDO_D12_TUNE_DF 0x04 --- 28 unchanged lines hidden --- | 787 788#define RTSX_LDO_VIO_CFG 0xFF75 789#define RTSX_LDO_VIO_TUNE_MASK 0x07 790#define RTSX_LDO_VIO_1V7 0x03 791 792#define RTSX_LDO_DV12S_CFG 0xFF76 793#define RTSX_LDO_D12_TUNE_MASK 0x07 794#define RTSX_LDO_D12_TUNE_DF 0x04 --- 28 unchanged lines hidden --- |