ata-marvell.c (6bd8779bb9b7969a45e443e8f552696a6a4dde47) ata-marvell.c (066f913a94b134b6d5e32b6af88f297c7da9c031)
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 40 unchanged lines hidden (view full) ---

49#include <dev/pci/pcireg.h>
50#include <dev/ata/ata-all.h>
51#include <dev/ata/ata-pci.h>
52#include <ata_if.h>
53
54/* local prototypes */
55static int ata_marvell_chipinit(device_t dev);
56static int ata_marvell_ch_attach(device_t dev);
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 40 unchanged lines hidden (view full) ---

49#include <dev/pci/pcireg.h>
50#include <dev/ata/ata-all.h>
51#include <dev/ata/ata-pci.h>
52#include <ata_if.h>
53
54/* local prototypes */
55static int ata_marvell_chipinit(device_t dev);
56static int ata_marvell_ch_attach(device_t dev);
57static void ata_marvell_setmode(device_t dev, int mode);
57static int ata_marvell_setmode(device_t dev, int target, int mode);
58static int ata_marvell_edma_ch_attach(device_t dev);
59static int ata_marvell_edma_ch_detach(device_t dev);
60static int ata_marvell_edma_status(device_t dev);
61static int ata_marvell_edma_begin_transaction(struct ata_request *request);
62static int ata_marvell_edma_end_transaction(struct ata_request *request);
63static void ata_marvell_edma_reset(device_t dev);
64static void ata_marvell_edma_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);
65static void ata_marvell_edma_dmainit(device_t dev);

--- 99 unchanged lines hidden (view full) ---

165ata_marvell_ch_attach(device_t dev)
166{
167 struct ata_channel *ch = device_get_softc(dev);
168 int error;
169
170 error = ata_pci_ch_attach(dev);
171 /* dont use 32 bit PIO transfers */
172 ch->flags |= ATA_USE_16BIT;
58static int ata_marvell_edma_ch_attach(device_t dev);
59static int ata_marvell_edma_ch_detach(device_t dev);
60static int ata_marvell_edma_status(device_t dev);
61static int ata_marvell_edma_begin_transaction(struct ata_request *request);
62static int ata_marvell_edma_end_transaction(struct ata_request *request);
63static void ata_marvell_edma_reset(device_t dev);
64static void ata_marvell_edma_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);
65static void ata_marvell_edma_dmainit(device_t dev);

--- 99 unchanged lines hidden (view full) ---

165ata_marvell_ch_attach(device_t dev)
166{
167 struct ata_channel *ch = device_get_softc(dev);
168 int error;
169
170 error = ata_pci_ch_attach(dev);
171 /* dont use 32 bit PIO transfers */
172 ch->flags |= ATA_USE_16BIT;
173 ch->flags |= ATA_CHECKS_CABLE;
173 return (error);
174}
175
174 return (error);
175}
176
176static void
177ata_marvell_setmode(device_t dev, int mode)
177static int
178ata_marvell_setmode(device_t dev, int target, int mode)
178{
179{
179 device_t gparent = GRANDPARENT(dev);
180 struct ata_pci_controller *ctlr = device_get_softc(gparent);
181 struct ata_device *atadev = device_get_softc(dev);
180 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
181 struct ata_channel *ch = device_get_softc(dev);
182
182
183 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma);
184 mode = ata_check_80pin(dev, mode);
185 if (!ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode))
186 atadev->mode = mode;
183 mode = min(mode, ctlr->chip->max_dma);
184 /* Check for 80pin cable present. */
185 if (mode > ATA_UDMA2 && ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x01) {
186 ata_print_cable(dev, "controller");
187 mode = ATA_UDMA2;
188 }
189 /* Nothing to do to setup mode, the controller snoop SET_FEATURE cmd. */
190 return (mode);
187}
188
189int
190ata_marvell_edma_chipinit(device_t dev)
191{
192 struct ata_pci_controller *ctlr = device_get_softc(dev);
193
194 if (ata_setup_interrupt(dev, ata_generic_intr))

--- 10 unchanged lines hidden (view full) ---

205
206 /* mask all PCI interrupts */
207 ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x00000000);
208
209 ctlr->ch_attach = ata_marvell_edma_ch_attach;
210 ctlr->ch_detach = ata_marvell_edma_ch_detach;
211 ctlr->reset = ata_marvell_edma_reset;
212 ctlr->setmode = ata_sata_setmode;
191}
192
193int
194ata_marvell_edma_chipinit(device_t dev)
195{
196 struct ata_pci_controller *ctlr = device_get_softc(dev);
197
198 if (ata_setup_interrupt(dev, ata_generic_intr))

--- 10 unchanged lines hidden (view full) ---

209
210 /* mask all PCI interrupts */
211 ATA_OUTL(ctlr->r_res1, 0x01d5c, 0x00000000);
212
213 ctlr->ch_attach = ata_marvell_edma_ch_attach;
214 ctlr->ch_detach = ata_marvell_edma_ch_detach;
215 ctlr->reset = ata_marvell_edma_reset;
216 ctlr->setmode = ata_sata_setmode;
217 ctlr->getrev = ata_sata_getrev;
213 ctlr->channels = ctlr->chip->cfg1;
214
215 /* clear host controller interrupts */
216 ATA_OUTL(ctlr->r_res1, 0x20014, 0x00000000);
217 if (ctlr->chip->cfg1 > 4)
218 ATA_OUTL(ctlr->r_res1, 0x30014, 0x00000000);
219
220 /* clear PCI interrupts */

--- 55 unchanged lines hidden (view full) ---

276 ch->r_io[ATA_SCONTROL].offset = 0x02308 + ATA_MV_EDMA_BASE(ch);
277 ch->r_io[ATA_SACTIVE].res = ctlr->r_res1;
278 ch->r_io[ATA_SACTIVE].offset = 0x02350 + ATA_MV_EDMA_BASE(ch);
279 break;
280 }
281
282 ch->flags |= ATA_NO_SLAVE;
283 ch->flags |= ATA_USE_16BIT; /* XXX SOS needed ? */
218 ctlr->channels = ctlr->chip->cfg1;
219
220 /* clear host controller interrupts */
221 ATA_OUTL(ctlr->r_res1, 0x20014, 0x00000000);
222 if (ctlr->chip->cfg1 > 4)
223 ATA_OUTL(ctlr->r_res1, 0x30014, 0x00000000);
224
225 /* clear PCI interrupts */

--- 55 unchanged lines hidden (view full) ---

281 ch->r_io[ATA_SCONTROL].offset = 0x02308 + ATA_MV_EDMA_BASE(ch);
282 ch->r_io[ATA_SACTIVE].res = ctlr->r_res1;
283 ch->r_io[ATA_SACTIVE].offset = 0x02350 + ATA_MV_EDMA_BASE(ch);
284 break;
285 }
286
287 ch->flags |= ATA_NO_SLAVE;
288 ch->flags |= ATA_USE_16BIT; /* XXX SOS needed ? */
289 ch->flags |= ATA_SATA;
284 ata_generic_hw(dev);
285 ch->hw.begin_transaction = ata_marvell_edma_begin_transaction;
286 ch->hw.end_transaction = ata_marvell_edma_end_transaction;
287 ch->hw.status = ata_marvell_edma_status;
288
289 /* disable the EDMA machinery */
290 ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
291 DELAY(100000); /* SOS should poll for disabled */

--- 304 unchanged lines hidden (view full) ---

596
597 /* if 64bit support present adjust max address used */
598 if (ATA_INL(ctlr->r_res1, 0x00d00) & 0x00000004)
599 ch->dma.max_address = BUS_SPACE_MAXADDR;
600
601 /* chip does not reliably do 64K DMA transfers */
602 if (ctlr->chip->cfg2 == MV_50XX || ctlr->chip->cfg2 == MV_60XX)
603 ch->dma.max_iosize = 64 * DEV_BSIZE;
290 ata_generic_hw(dev);
291 ch->hw.begin_transaction = ata_marvell_edma_begin_transaction;
292 ch->hw.end_transaction = ata_marvell_edma_end_transaction;
293 ch->hw.status = ata_marvell_edma_status;
294
295 /* disable the EDMA machinery */
296 ATA_OUTL(ctlr->r_res1, 0x02028 + ATA_MV_EDMA_BASE(ch), 0x00000002);
297 DELAY(100000); /* SOS should poll for disabled */

--- 304 unchanged lines hidden (view full) ---

602
603 /* if 64bit support present adjust max address used */
604 if (ATA_INL(ctlr->r_res1, 0x00d00) & 0x00000004)
605 ch->dma.max_address = BUS_SPACE_MAXADDR;
606
607 /* chip does not reliably do 64K DMA transfers */
608 if (ctlr->chip->cfg2 == MV_50XX || ctlr->chip->cfg2 == MV_60XX)
609 ch->dma.max_iosize = 64 * DEV_BSIZE;
604 else
605 ch->dma.max_iosize = (ATA_DMA_ENTRIES - 1) * PAGE_SIZE;
606}
607
608ATA_DECLARE_DRIVER(ata_marvell);
610}
611
612ATA_DECLARE_DRIVER(ata_marvell);