gpioiic.4 (5748b897da441d1f10e1fe0c39155ea33d6d383a) gpioiic.4 (6a6ce390c71e6d9db3677bfed4e82e29ee0da9c6)
1.\" Copyright (c) 2013, Luiz Otavio O Souza <loos@FreeBSD.org>
2.\" All rights reserved.
3.\"
4.\" Redistribution and use in source and binary forms, with or without
5.\" modification, are permitted provided that the following conditions
6.\" are met:
7.\" 1. Redistributions of source code must retain the above copyright
8.\" notice, this list of conditions and the following disclaimer.

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26.\"
27.Dd February 13, 2014
28.Dt GPIOIIC 4
29.Os
30.Sh NAME
31.Nm gpioiic
32.Nd GPIO I2C bit-banging device driver
33.Sh SYNOPSIS
1.\" Copyright (c) 2013, Luiz Otavio O Souza <loos@FreeBSD.org>
2.\" All rights reserved.
3.\"
4.\" Redistribution and use in source and binary forms, with or without
5.\" modification, are permitted provided that the following conditions
6.\" are met:
7.\" 1. Redistributions of source code must retain the above copyright
8.\" notice, this list of conditions and the following disclaimer.

--- 17 unchanged lines hidden (view full) ---

26.\"
27.Dd February 13, 2014
28.Dt GPIOIIC 4
29.Os
30.Sh NAME
31.Nm gpioiic
32.Nd GPIO I2C bit-banging device driver
33.Sh SYNOPSIS
34To compile this driver into the kernel,
35place the following lines in your
36kernel configuration file:
37.Bd -ragged -offset indent
34.Cd "device gpio"
35.Cd "device gpioiic"
36.Cd "device iic"
37.Cd "device iicbb"
38.Cd "device iicbus"
38.Cd "device gpio"
39.Cd "device gpioiic"
40.Cd "device iic"
41.Cd "device iicbb"
42.Cd "device iicbus"
43.Ed
39.Sh DESCRIPTION
40The
44.Sh DESCRIPTION
45The
41.Em gpioiic
46.Nm
42driver provides an IIC bit-banging interface using two GPIO pins for the
43SCL and SDA on the
47driver provides an IIC bit-banging interface using two GPIO pins for the
48SCL and SDA on the
44.Em gpiobus .
49.Nm gpiobus .
45.Nm
50.Nm
46implements an open colector kind of output, as recommended by the standard,
51implements an open collector kind of output, as recommended by the standard,
47when driving the pins on the
52when driving the pins on the
48.Em gpiobus ,
53.Nm gpiobus ,
49i.e, they are never switched to the logical value of '1',
50or they are '0' or simply open (Hi-Z/tri-state).
51So the pullup resistors are required so
52.Nm
53can work.
54.Pp
54i.e, they are never switched to the logical value of '1',
55or they are '0' or simply open (Hi-Z/tri-state).
56So the pullup resistors are required so
57.Nm
58can work.
59.Pp
55On a hint based system, like
56.Li MIPS , these values are configureable for the
57.Nm gpioiic :
60On a
61.Xr device.hints 5
62based system, like
63.Li MIPS ,
64these values are configurable for the
65.Nm :
58.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
59.It Va hint.gpioiic.%d.at
66.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
67.It Va hint.gpioiic.%d.at
60The gpiobus you are attaching to.
68The
69.Nm gpiobus
70you are attaching to.
61Normally just gpiobus0.
62.It Va hint.gpioiic.%d.pins
63This is a bitmask of the pins on the
71Normally just gpiobus0.
72.It Va hint.gpioiic.%d.pins
73This is a bitmask of the pins on the
64.Em gpiobus
74.Nm gpiobus
65that are to be used for SCLOCK and SDATA from the GPIO IIC
66bit-banging bus.
67To configure pin 0 and 7, use the bitmask of
680b10000001 and convert it to a hexadecimal value of 0x0081.
69Please note that this mask should only ever have two bits set
75that are to be used for SCLOCK and SDATA from the GPIO IIC
76bit-banging bus.
77To configure pin 0 and 7, use the bitmask of
780b10000001 and convert it to a hexadecimal value of 0x0081.
79Please note that this mask should only ever have two bits set
70(any others bits - i.e., pins - will be ignored).
80(any other bits - i.e., pins - will be ignored).
71.It Va hint.gpioiic.%d.scl
72Indicates which bit in the
73.Va hint.gpioiic.%d.pins
74should be used as the SCLOCK
75source.
76Optional, defaults to 0.
77.It Va hint.gpioiic.%d.sda
78Indicates which bit in the
79.Va hint.gpioiic.%d.pins
80should be used as the SDATA
81source.
82Optional, defaults to 1.
83.El
84.Pp
85On a
86.Xr FDT 4
87based system, like
81.It Va hint.gpioiic.%d.scl
82Indicates which bit in the
83.Va hint.gpioiic.%d.pins
84should be used as the SCLOCK
85source.
86Optional, defaults to 0.
87.It Va hint.gpioiic.%d.sda
88Indicates which bit in the
89.Va hint.gpioiic.%d.pins
90should be used as the SDATA
91source.
92Optional, defaults to 1.
93.El
94.Pp
95On a
96.Xr FDT 4
97based system, like
88.Li ARM , the dts part for a
98.Li ARM ,
99the DTS part for a
89.Nm gpioiic
90device usually looks like:
91.Bd -literal
92gpio: gpio {
93
94 gpio-controller;
95 ...
96

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100.Nm gpioiic
101device usually looks like:
102.Bd -literal
103gpio: gpio {
104
105 gpio-controller;
106 ...
107

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